source: SVN/cambria/redboot/packages/devs/eth/arm/ixdp465/npe/current/include/ixdp465_npe.inl @ 1

Last change on this file since 1 was 1, checked in by Tim Harvey, 3 years ago

restored latest version of files from server backup

Signed-off-by: Tim Harvey <tharvey@…>

File size: 6.8 KB
Line 
1//==========================================================================
2//
3//      ixdp465_npe.inl
4//
5//      IXDP465 ethernet I/O definitions.
6//
7//==========================================================================
8//####ECOSGPLCOPYRIGHTBEGIN####
9// -------------------------------------------
10// This file is part of eCos, the Embedded Configurable Operating System.
11// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
12//
13// eCos is free software; you can redistribute it and/or modify it under
14// the terms of the GNU General Public License as published by the Free
15// Software Foundation; either version 2 or (at your option) any later version.
16//
17// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18// WARRANTY; without even the implied warranty of MERCHANTABILITY or
19// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20// for more details.
21//
22// You should have received a copy of the GNU General Public License along
23// with eCos; if not, write to the Free Software Foundation, Inc.,
24// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25//
26// As a special exception, if other files instantiate templates or use macros
27// or inline functions from this file, or you compile this file and link it
28// with other works to produce a work based on this file, this file does not
29// by itself cause the resulting work to be covered by the GNU General Public
30// License. However the source code for this file must still be made available
31// in accordance with section (3) of the GNU General Public License.
32//
33// This exception does not invalidate any other reasons why a work based on
34// this file might be covered by the GNU General Public License.
35//
36// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37// at http://sources.redhat.com/ecos/ecos-license/
38// -------------------------------------------
39//####ECOSGPLCOPYRIGHTEND####
40//==========================================================================
41//#####DESCRIPTIONBEGIN####
42//
43// Author(s):   msalter
44// Contributors:msalter
45// Date:        2003-03-20
46// Purpose:     ixdp465 NPE ethernet definitions
47//####DESCRIPTIONEND####
48//==========================================================================
49
50#ifdef CYGPKG_DEVS_ETH_ARM_IXDP465_NPE_ETH0
51#define CYGSEM_INTEL_NPE_USE_ETH0
52#define CYGNUM_ETH0_ETH_ID    IX_ETH_PORT_1
53#define CYGNUM_ETH0_PHY_NO    NPE_PHY_UNKNOWN
54#define CYGNUM_ETH0_PHY_MASK  ((1 << 9) | (1 << 0))
55#define CYGDAT_NPE_ETH0_NAME  CYGDAT_DEVS_ETH_ARM_IXDP465_NPE_ETH0_NAME
56#endif
57
58#ifdef CYGPKG_DEVS_ETH_ARM_IXDP465_NPE_ETH1
59#define CYGSEM_INTEL_NPE_USE_ETH1
60#define CYGNUM_ETH1_ETH_ID    IX_ETH_PORT_2
61#define CYGNUM_ETH1_PHY_NO    NPE_PHY_UNKNOWN
62#define CYGNUM_ETH1_PHY_MASK  ((1 << 13) | (1 << 1))
63#define CYGDAT_NPE_ETH1_NAME  CYGDAT_DEVS_ETH_ARM_IXDP465_NPE_ETH1_NAME
64#endif
65
66#ifdef CYGPKG_DEVS_ETH_ARM_IXDP465_NPE_ETH2
67#define CYGSEM_INTEL_NPE_USE_ETH2
68#define CYGNUM_ETH2_ETH_ID    IX_ETH_PORT_3
69#define CYGNUM_ETH2_PHY_NO    NPE_PHY_UNKNOWN
70#define CYGNUM_ETH2_PHY_MASK  ((1 << 8) | (1 << 2) | (1 << 1))
71#define CYGDAT_NPE_ETH2_NAME  CYGDAT_DEVS_ETH_ARM_IXDP465_NPE_ETH2_NAME
72#endif
73
74#ifdef CYGSEM_NPE_SMII
75
76#define CYGDAT_NPE_SMII_DLL_SETTING 0x18e
77
78static int
79ixdp465_smii_init(void)
80{
81#if CYGINT_DEVS_ETH_INTEL_NPEB_SMII
82    int smii_mask = 0;
83    int smii_cnt = 0;
84
85    diag_printf("\nChecking for SMII configuration...");
86
87    // We need this to before looking for PHYs
88    if (!npe_csr_load()) {
89        diag_printf("ixdp465_smii_init: npe_csr_load failed\n");
90        return 0;
91    }
92
93    // IXDP465 jumpering supports:
94    //
95    //    Normal MII mode:  NPEB-->PHY0, NPEC-->PHY1, NPEA -->PHY1||PHY2
96    //    SMII mode: NPEA-->PHY8, NPEB-->PHY9, NPEC-->PHY13
97    //
98    //    NPEB must be in SMII mode for NPEA or NPEC to use SMII
99    //   
100    if (!check_phy_association(IX_ETH_PORT_1, 0)) {
101        smii_mask |= (1 << IX_ETH_PORT_1);
102        ++smii_cnt;
103#if CYGINT_DEVS_ETH_INTEL_NPEC_SMII
104        if (!check_phy_association(IX_ETH_PORT_2, 1)) {
105            smii_mask |= (1 << IX_ETH_PORT_2);
106            ++smii_cnt;
107        } else
108            set_phy_association(IX_ETH_PORT_2, 1);
109#endif
110#if CYGINT_DEVS_ETH_INTEL_NPEA_SMII
111        if (npe_exists[IX_ETH_PORT_3]) {
112            if (!check_phy_association(IX_ETH_PORT_3, 2)) {
113                if (smii_mask & (1 << IX_ETH_PORT_2)) {
114                    // NPEC not connected to PHY1, maybe NPEA is
115                    if (!check_phy_association(IX_ETH_PORT_3, 1)) {
116                        smii_mask |= (1 << IX_ETH_PORT_3);
117                        ++smii_cnt;
118                    } else
119                        set_phy_association(IX_ETH_PORT_3, 1);
120                } else {
121                    smii_mask |= (1 << IX_ETH_PORT_3);
122                    ++smii_cnt;
123                }
124            } else
125                set_phy_association(IX_ETH_PORT_3, 2);
126        }
127#endif
128    } else {
129        set_phy_association(IX_ETH_PORT_1, 0);
130        set_phy_association(IX_ETH_PORT_2, 1);
131        // NPE-A will be PHY 1, or PHY2
132        set_phy_mask(IX_ETH_PORT_3, (1 << 2) | (1 << 1));
133    }
134
135    // We need this to put CSR back the way it was so that
136    // the "real" npe_csr_load call will work.
137    npe_csr_unload();
138
139    if (smii_cnt) {
140        // One or more ports using SMII. (or has PHY missing)
141        diag_printf("yes.\nInitializing SMII for [NPE-B");
142        if (--smii_cnt > 0)
143            diag_printf("][");
144        if (smii_mask & (1 << IX_ETH_PORT_2)) {
145            diag_printf("NPE-C");
146            if (--smii_cnt > 0)
147                diag_printf("][");
148        }
149        if (smii_mask & (1 << IX_ETH_PORT_3))
150            diag_printf("NPE-A");
151        printf("]...");
152       
153        if (!npe_enable_smii_mode(smii_mask)) {
154            diag_printf("failed!\n");
155            return 0;
156        }
157
158        set_phy_association(IX_ETH_PORT_1, 9);
159
160#if CYGINT_DEVS_ETH_INTEL_NPEC_SMII
161        if (smii_mask & (1 << IX_ETH_PORT_2))
162            set_phy_association(IX_ETH_PORT_2, 13);
163#endif
164#if CYGINT_DEVS_ETH_INTEL_NPEA_SMII
165        if (smii_mask & (1 << IX_ETH_PORT_3))
166            set_phy_association(IX_ETH_PORT_3, 8);
167#endif
168        diag_printf("done.");
169    } else
170        diag_printf("no, using MII.");
171
172#endif  // CYGINT_DEVS_ETH_INTEL_NPEB_SMII
173    return 1;
174}
175
176#define CYGHAL_NPE_SMII_INIT() ixdp465_smii_init()
177#endif
178
179
180#define CYGDAT_ETH0_DEFAULT_ESA {0x00, 0x03, 0x47, 0xdf, 0x32, 0xa8}
181#define CYGDAT_ETH1_DEFAULT_ESA {0x00, 0x03, 0x47, 0xdf, 0x32, 0xaa}
182#define CYGDAT_ETH2_DEFAULT_ESA {0x00, 0x03, 0x47, 0xdf, 0x32, 0xac}
183
184#ifndef CYGPKG_DEVS_ETH_INTEL_NPE_REDBOOT_HOLDS_ESA
185#ifdef CYGSEM_DEVS_ETH_INTEL_NPE_PLATFORM_EEPROM
186extern int cyghal_get_npe_esa(int, cyg_uint8 *);
187
188#define CYGHAL_GET_NPE_ESA(_ethid,_addr,_res) \
189 (_res) = cyghal_get_npe_esa((_ethid), (_addr))
190
191#endif // CYGSEM_DEVS_ETH_INTEL_NPE_PLATFORM_EEPROM
192#endif // CYGPKG_DEVS_ETH_INTEL_NPE_REDBOOT_HOLDS_ESA
Note: See TracBrowser for help on using the repository browser.