source: SVN/cambria/redboot/packages/devs/eth/intel/npe/ethAcc/current/include/IxEthAccMii_p.h @ 1

Last change on this file since 1 was 1, checked in by Tim Harvey, 2 years ago

restored latest version of files from server backup

Signed-off-by: Tim Harvey <tharvey@…>

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1/**
2 * @file IxEthAccMii_p.h
3 *
4 * @author Intel Corporation
5 * @date
6 *
7 * @brief  MII Header file
8 *
9 * Design Notes:
10 *
11 *
12 * @par
13 * IXP400 SW Release version 2.3
14 *
15 * -- Copyright Notice --
16 *
17 * @par
18 * Copyright (c) 2001-2005, Intel Corporation.
19 * All rights reserved.
20 *
21 * @par
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
24 * are met:
25 * 1. Redistributions of source code must retain the above copyright
26 *    notice, this list of conditions and the following disclaimer.
27 * 2. Redistributions in binary form must reproduce the above copyright
28 *    notice, this list of conditions and the following disclaimer in the
29 *    documentation and/or other materials provided with the distribution.
30 * 3. Neither the name of the Intel Corporation nor the names of its contributors
31 *    may be used to endorse or promote products derived from this software
32 *    without specific prior written permission.
33 *
34 *
35 * @par
36 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
37 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
38 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
39 * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
40 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
41 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
42 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
43 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
44 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
45 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
46 * SUCH DAMAGE.
47 *
48 *
49 * @par
50 * -- End of Copyright Notice --
51 */
52
53#ifndef IxEthAccMii_p_H
54#define IxEthAccMii_p_H
55
56/* MII definitions - these have been verified against the LXT971 and LXT972 PHYs*/
57
58#define IXP400_ETH_ACC_MII_MAX_REG      32      /* max register per phy */
59
60#define IX_ETH_ACC_MII_REG_SHL    16
61#define IX_ETH_ACC_MII_ADDR_SHL   21
62
63/* Definitions for MII access routines*/
64 
65#define IX_ETH_ACC_MII_GO                  BIT(31)
66#define IX_ETH_ACC_MII_WRITE               BIT(26)
67#define IX_ETH_ACC_MII_TIMEOUT_10TH_SECS        5   
68#define IX_ETH_ACC_MII_10TH_SEC_IN_MILLIS     100
69#define IX_ETH_ACC_MII_READ_FAIL           BIT(31)
70 
71#define IX_ETH_ACC_MII_PHY_DEF_DELAY   300  /* max delay before link up, etc. */
72#define IX_ETH_ACC_MII_PHY_NO_DELAY    0x0  /* do not delay */
73#define IX_ETH_ACC_MII_PHY_NULL        0xff /* PHY is not present */
74#define IX_ETH_ACC_MII_PHY_DEF_ADDR    0x0  /* default PHY's logical address */
75
76#ifndef IX_ETH_ACC_MII_MONITOR_DELAY
77#   define IX_ETH_ACC_MII_MONITOR_DELAY   0x5    /* in seconds */
78#endif
79
80/* Register definition */ 
81
82#define IX_ETH_ACC_MII_CTRL_REG     0x0 /* Control Register */
83#define IX_ETH_ACC_MII_STAT_REG     0x1 /* Status Register */
84#define IX_ETH_ACC_MII_PHY_ID1_REG  0x2 /* PHY identifier 1 Register */
85#define IX_ETH_ACC_MII_PHY_ID2_REG  0x3 /* PHY identifier 2 Register */
86#define IX_ETH_ACC_MII_AN_ADS_REG   0x4 /* Auto-Negotiation       */
87                                        /* Advertisement Register */
88#define IX_ETH_ACC_MII_AN_PRTN_REG  0x5 /* Auto-Negotiation         */
89                                        /* partner ability Register */
90#define IX_ETH_ACC_MII_AN_EXP_REG   0x6 /* Auto-Negotiation   */
91                                        /* Expansion Register */
92#define IX_ETH_ACC_MII_AN_NEXT_REG  0x7 /* Auto-Negotiation            */
93                                        /* next-page transmit Register */
94
95IxEthAccStatus ixEthAccMdioShow (void);
96IxEthAccStatus ixEthAccMiiInit(void);
97void ixEthAccMiiUnload(void);
98
99#endif  /*IxEthAccMii_p_H*/
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