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1#ifndef CYGONCE_HAL_IO_H
2#define CYGONCE_HAL_IO_H
3
4//=============================================================================
5//
6//      hal_io.h
7//
8//      HAL device IO register support.
9//
10//=============================================================================
11//####ECOSGPLCOPYRIGHTBEGIN####
12// -------------------------------------------
13// This file is part of eCos, the Embedded Configurable Operating System.
14// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
15//
16// eCos is free software; you can redistribute it and/or modify it under
17// the terms of the GNU General Public License as published by the Free
18// Software Foundation; either version 2 or (at your option) any later version.
19//
20// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
21// WARRANTY; without even the implied warranty of MERCHANTABILITY or
22// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
23// for more details.
24//
25// You should have received a copy of the GNU General Public License along
26// with eCos; if not, write to the Free Software Foundation, Inc.,
27// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28//
29// As a special exception, if other files instantiate templates or use macros
30// or inline functions from this file, or you compile this file and link it
31// with other works to produce a work based on this file, this file does not
32// by itself cause the resulting work to be covered by the GNU General Public
33// License. However the source code for this file must still be made available
34// in accordance with section (3) of the GNU General Public License.
35//
36// This exception does not invalidate any other reasons why a work based on
37// this file might be covered by the GNU General Public License.
38//
39// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
40// at http://sources.redhat.com/ecos/ecos-license/
41// -------------------------------------------
42//####ECOSGPLCOPYRIGHTEND####
43//=============================================================================
44//#####DESCRIPTIONBEGIN####
45//
46// Author(s):    nickg, gthomas
47// Contributors: Fabrice Gautier
48// Date:         1998-09-11
49// Purpose:      Define IO register support
50// Description:  The macros defined here provide the HAL APIs for handling
51//               device IO control registers.
52//             
53// Usage:
54//               #include <cyg/hal/hal_io.h>
55//               ...
56//             
57//
58//####DESCRIPTIONEND####
59//
60//=============================================================================
61
62#include <pkgconf/system.h>
63#include <cyg/infra/cyg_type.h>
64
65#include <cyg/hal/basetype.h>
66
67//-----------------------------------------------------------------------------
68// Include plf_io.h for platforms. Either via var_io.h or directly.
69#ifdef CYGBLD_HAL_ARM_VAR_IO_H
70#include <cyg/hal/var_io.h>
71#else
72#include <cyg/hal/plf_io.h>
73#endif
74
75
76//-----------------------------------------------------------------------------
77// IO Register address.
78// This type is for recording the address of an IO register.
79
80typedef volatile CYG_ADDRWORD HAL_IO_REGISTER;
81
82//-----------------------------------------------------------------------------
83// HAL IO macros.
84#ifndef HAL_IO_MACROS_DEFINED
85
86//-----------------------------------------------------------------------------
87// BYTE Register access.
88// Individual and vectorized access to 8 bit registers.
89
90// Little-endian version or big-endian version that doesn't need address munging
91#if (CYG_BYTEORDER == CYG_LSBFIRST) || defined(HAL_IO_MACROS_NO_ADDRESS_MUNGING)
92
93#define HAL_READ_UINT8( _register_, _value_ ) \
94        ((_value_) = *((volatile CYG_BYTE *)(_register_)))
95
96#define HAL_WRITE_UINT8( _register_, _value_ ) \
97        (*((volatile CYG_BYTE *)(_register_)) = (_value_))
98
99#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ )     \
100    CYG_MACRO_START                                                     \
101    cyg_count32 _i_,_j_;                                                \
102    for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_))     \
103        (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_];        \
104    CYG_MACRO_END
105
106#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ )    \
107    CYG_MACRO_START                                                     \
108    cyg_count32 _i_,_j_;                                                \
109    for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_))     \
110        ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_];        \
111    CYG_MACRO_END
112
113#define HAL_READ_UINT8_STRING( _register_, _buf_, _count_ )             \
114    CYG_MACRO_START                                                     \
115    cyg_count32 _i_;                                                    \
116    for( _i_ = 0; _i_ < (_count_); _i_++)                               \
117        (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_i_];        \
118    CYG_MACRO_END
119
120#define HAL_WRITE_UINT8_STRING( _register_, _buf_, _count_ )            \
121    CYG_MACRO_START                                                     \
122    cyg_count32 _i_;                                                    \
123    for( _i_ = 0; _i_ < (_count_); _i_++)                               \
124        ((volatile CYG_BYTE *)(_register_)) = (_buf_)[_i_];             \
125    CYG_MACRO_END
126
127#else // Big-endian version
128
129#define HAL_READ_UINT8( _register_, _value_ ) \
130        ((_value_) = *((volatile CYG_BYTE *)((CYG_ADDRWORD)(_register_)^3)))
131
132#define HAL_WRITE_UINT8( _register_, _value_ ) \
133        (*((volatile CYG_BYTE *)((CYG_ADDRWORD)(_register_)^3)) = (_value_))
134
135#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ )     \
136    CYG_MACRO_START                                                     \
137    cyg_count32 _i_,_j_;                                                \
138    volatile CYG_BYTE* _r_ = ((CYG_ADDRWORD)(_register_)^3);            \
139    for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_))     \
140        (_buf_)[_i_] = _r_[_j_];                                        \
141    CYG_MACRO_END
142
143#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ )    \
144    CYG_MACRO_START                                                     \
145    cyg_count32 _i_,_j_;                                                \
146    volatile CYG_BYTE* _r_ = ((CYG_ADDRWORD)(_register_)^3);            \
147    for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_))     \
148        _r_[_j_] = (_buf_)[_i_];                                        \
149    CYG_MACRO_END
150
151#define HAL_READ_UINT8_STRING( _register_, _buf_, _count_ )             \
152    CYG_MACRO_START                                                     \
153    cyg_count32 _i_;                                                    \
154    volatile CYG_BYTE* _r_ = ((CYG_ADDRWORD)(_register_)^3);            \
155    for( _i_ = 0; _i_ < (_count_); _i_++;                               \
156        (_buf_)[_i_] = _r_[_i_];                                        \
157    CYG_MACRO_END
158
159#define HAL_WRITE_UINT8_STRING( _register_, _buf_, _count_ )            \
160    CYG_MACRO_START                                                     \
161    cyg_count32 _i_;                                                    \
162    volatile CYG_BYTE* _r_ = ((CYG_ADDRWORD)(_register_)^3);            \
163    for( _i_ = 0; _i_ < (_count_); _i_++)                               \
164        _r_[_i_] = (_buf_)[_i_];                                        \
165    CYG_MACRO_END
166
167#endif // Big-endian
168
169//-----------------------------------------------------------------------------
170// 16 bit access.
171// Individual and vectorized access to 16 bit registers.
172   
173// Little-endian version or big-endian version that doesn't need address munging
174#if (CYG_BYTEORDER == CYG_LSBFIRST) || defined(HAL_IO_MACROS_NO_ADDRESS_MUNGING)
175
176#define HAL_READ_UINT16( _register_, _value_ ) \
177        ((_value_) = *((volatile CYG_WORD16 *)(_register_)))
178
179#define HAL_WRITE_UINT16( _register_, _value_ ) \
180        (*((volatile CYG_WORD16 *)(_register_)) = (_value_))
181
182#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ )    \
183    CYG_MACRO_START                                                     \
184    cyg_count32 _i_,_j_;                                                \
185    for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_))     \
186        (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_];      \
187    CYG_MACRO_END
188
189#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ )   \
190    CYG_MACRO_START                                                     \
191    cyg_count32 _i_,_j_;                                                \
192    for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_))     \
193        ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_];      \
194    CYG_MACRO_END
195
196#define HAL_READ_UINT16_STRING( _register_, _buf_, _count_)             \
197    CYG_MACRO_START                                                     \
198    cyg_count32 _i_;                                                    \
199    for( _i_ = 0; _i_ < (_count_); _i_++)                               \
200        (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_i_];      \
201    CYG_MACRO_END
202
203#define HAL_WRITE_UINT16_STRING( _register_, _buf_, _count_)            \
204    CYG_MACRO_START                                                     \
205    cyg_count32 _i_;                                                    \
206    for( _i_ = 0; _i_ < (_count_); _i_++)                               \
207        ((volatile CYG_WORD16 *)(_register_))[_i_] = (_buf_)[_i_];      \
208    CYG_MACRO_END
209
210
211#else // Big-endian version
212
213#define HAL_READ_UINT16( _register_, _value_ ) \
214        ((_value_) = *((volatile CYG_WORD16 *)((CYG_ADDRWORD)(_register_)^3)))
215
216#define HAL_WRITE_UINT16( _register_, _value_ ) \
217        (*((volatile CYG_WORD16 *)((CYG_ADDRWORD)(_register_)^3)) = (_value_))
218
219#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ )    \
220    CYG_MACRO_START                                                     \
221    cyg_count32 _i_,_j_;                                                \
222    volatile CYG_WORD16* _r_ = ((CYG_ADDRWORD)(_register_)^3);          \
223    for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_))     \
224        (_buf_)[_i_] = _r_[_j_];                                        \
225    CYG_MACRO_END
226
227#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ )   \
228    CYG_MACRO_START                                                     \
229    cyg_count32 _i_,_j_;                                                \
230    volatile CYG_WORD16* _r_ = ((CYG_ADDRWORD)(_register_)^3);          \
231    for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_))     \
232        _r_[_j_] = (_buf_)[_i_];                                        \
233    CYG_MACRO_END
234
235#define HAL_READ_UINT16_STRING( _register_, _buf_, _count_)             \
236    CYG_MACRO_START                                                     \
237    cyg_count32 _i_;                                                    \
238    volatile CYG_WORD16* _r_ = ((CYG_ADDRWORD)(_register_)^3);          \
239    for( _i_ = 0 = 0; _i_ < (_count_); _i_++)                           \
240        (_buf_)[_i_] = _r_[_i_];                                        \
241    CYG_MACRO_END
242
243#define HAL_WRITE_UINT16_STRING( _register_, _buf_, _count_)            \
244    CYG_MACRO_START                                                     \
245    cyg_count32 _i_;                                                    \
246    volatile CYG_WORD16* _r_ = ((CYG_ADDRWORD)(_register_)^3);          \
247    for( _i_ = 0 = 0; _i_ < (_count_); _i_++)                           \
248        _r_[_i_] = (_buf_)[_i_];                                        \
249    CYG_MACRO_END
250
251
252#endif // Big-endian
253
254//-----------------------------------------------------------------------------
255// 32 bit access.
256// Individual and vectorized access to 32 bit registers.
257
258// Note: same macros for little- and big-endian systems.
259   
260#define HAL_READ_UINT32( _register_, _value_ ) \
261        ((_value_) = *((volatile CYG_WORD32 *)(_register_)))
262
263#define HAL_WRITE_UINT32( _register_, _value_ ) \
264        (*((volatile CYG_WORD32 *)(_register_)) = (_value_))
265
266#define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ )    \
267    CYG_MACRO_START                                                     \
268    cyg_count32 _i_,_j_;                                                \
269    for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_))     \
270        (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_];      \
271    CYG_MACRO_END
272
273#define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ )   \
274    CYG_MACRO_START                                                     \
275    cyg_count32 _i_,_j_;                                                \
276    for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_))     \
277        ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_];      \
278    CYG_MACRO_END
279
280#define HAL_READ_UINT32_STRING( _register_, _buf_, _count_)             \
281    CYG_MACRO_START                                                     \
282    cyg_count32 _i_;                                                    \
283    for( _i_ = 0; _i_ < (_count_); _i_++)                               \
284        (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_i_];      \
285    CYG_MACRO_END
286
287#define HAL_WRITE_UINT32_STRING( _register_, _buf_, _count_)            \
288    CYG_MACRO_START                                                     \
289    cyg_count32 _i_;                                                    \
290    for( _i_ = 0; _i_ < (_count_); _i_++)                               \
291        ((volatile CYG_WORD32 *)(_register_))[_i_] = (_buf_)[_i_];      \
292    CYG_MACRO_END
293
294
295#define HAL_IO_MACROS_DEFINED
296
297#endif // !HAL_IO_MACROS_DEFINED
298
299// Enforce a flow "barrier" to prevent optimizing compiler from reordering
300// operations.
301#define HAL_IO_BARRIER()
302
303//-----------------------------------------------------------------------------
304#endif // ifndef CYGONCE_HAL_IO_H
305// End of hal_io.h
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