source: SVN/cambria/redboot/packages/hal/arm/xscale/ixp425/current/cdl/hal_arm_xscale_ixp425.cdl @ 1

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1# ====================================================================
2#
3#      hal_arm_xscale_ixp425.cdl
4#
5#      Intel XScale architectural HAL package configuration data
6#
7# ====================================================================
8#####ECOSGPLCOPYRIGHTBEGIN####
9## -------------------------------------------
10## This file is part of eCos, the Embedded Configurable Operating System.
11## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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14## the terms of the GNU General Public License as published by the Free
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23## with eCos; if not, write to the Free Software Foundation, Inc.,
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25##
26## As a special exception, if other files instantiate templates or use macros
27## or inline functions from this file, or you compile this file and link it
28## with other works to produce a work based on this file, this file does not
29## by itself cause the resulting work to be covered by the GNU General Public
30## License. However the source code for this file must still be made available
31## in accordance with section (3) of the GNU General Public License.
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33## This exception does not invalidate any other reasons why a work based on
34## this file might be covered by the GNU General Public License.
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37## at http://sources.redhat.com/ecos/ecos-license/
38## -------------------------------------------
39#####ECOSGPLCOPYRIGHTEND####
40# ====================================================================
41######DESCRIPTIONBEGIN####
42#
43# Author(s):      msalter
44# Original data:  msalter
45# Contributors:
46# Date:           2002-12-06
47#
48#####DESCRIPTIONEND####
49#
50# ====================================================================
51cdl_package CYGPKG_HAL_ARM_XSCALE_IXP425 {
52    display       "Intel XScale IXP4xx Network Processor"
53    parent        CYGPKG_HAL_ARM
54    implements    CYGINT_HAL_DEBUG_GDB_STUBS
55    implements    CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
56    implements    CYGINT_HAL_ARM_MEM_REAL_REGION_TOP
57    implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
58    implements    CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT
59    hardware
60    include_dir   cyg/hal
61    define_header hal_arm_xscale_ixp425.h
62    description   "
63        This HAL variant package provides generic support
64        for the Intel IXP425 network processors. It is also
65        necessary to select a specific target platform HAL
66        package."
67
68    # Let the architectural HAL see this variant's interrupts file
69    define_proc {
70        puts $::cdl_header \
71       "#define CYGBLD_HAL_VAR_INTS_H <cyg/hal/hal_var_ints.h>"
72        puts $::cdl_header \
73       "#define CYGBLD_HAL_VAR_H <cyg/hal/hal_ixp425.h>"
74        puts $::cdl_system_header "#define CYGBLD_HAL_ARM_VAR_IO_H"
75    }
76
77    compile       ixp425_misc.c ixp425_pci.c ixp425_diag.c
78
79    cdl_option CYGHWR_HAL_ARM_XSCALE_CPU {
80        display       "Intel XScale processor"
81        flavor        data
82        default_value {"IXP42x"}
83        legal_values  {"IXP42x" "IXP43x" "IXP46x" }
84        description   "
85            The XScale network processors come in several flavors.  The main
86            differences being in the on-chip peripherals"
87    }
88    cdl_option CYGHWR_HAL_ARM_XSCALE_EXP32 {
89        display       "Intel XScale processor"
90        active_if     { CYGHWR_HAL_ARM_XSCALE_CPU == "IXP46x" }
91        flavor        bool
92        default_value 0
93        description   "
94            Some XScale network processors support 32MiB devices on the
95            expansion bus. Define this if any of the attached devices
96            are configured as 32MiB."
97    }
98
99    cdl_option CYGHWR_HAL_ARM_XSCALE_PROCESSOR_CCLK {
100        display       "Processor clock rate"
101        flavor        data
102        default_value { CYGHWR_HAL_ARM_XSCALE_PROCESSOR_CCLK_DEFAULT ?
103                        CYGHWR_HAL_ARM_XSCALE_PROCESSOR_CCLK_DEFAULT : 533333}
104        description   "
105           The XScale processor can run at various frequencies.
106           These values are expressed in KHz."
107    }
108
109    cdl_option CYGHWR_HAL_IXP425_PCI_NP_WORKAROUND {
110        display "Enable IXP425 PCI NP read problem workaround"
111        flavor bool
112        default_value 0
113    }
114 
115    # Real-time clock/counter specifics
116    cdl_component CYGNUM_HAL_RTC_CONSTANTS {
117        display       "Real-time clock constants"
118        flavor        none
119        no_define
120   
121        cdl_option CYGNUM_HAL_RTC_NUMERATOR {
122            display       "Real-time clock numerator"
123            flavor        data
124            default_value 1000000000
125        }
126        cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
127            display       "Real-time clock denominator"
128            flavor        data
129            default_value 100
130            description   "
131              This option selects the heartbeat rate for the real-time clock.
132              The rate is specified in ticks per second.  Change this value
133              with caution - too high and your system will become saturated
134              just handling clock interrupts, too low and some operations
135              such as thread scheduling may become sluggish."
136        }
137        cdl_option CYGNUM_HAL_RTC_PERIOD {
138            display       "Real-time clock period"
139            flavor        data
140            default_value 1000000/CYGNUM_HAL_RTC_DENOMINATOR
141            description   "
142              This value gives the RTC period in microseconds. It is
143              translated into the actual clock period value in the clock
144              init and read functions."
145        }
146    }
147
148    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT {
149        display      "Default console channel."
150        flavor       data
151        legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
152        calculated   0
153    }
154 
155    cdl_option CYGNUM_HAL_ARM_IXP425_SERIAL_CHANNELS {
156        display      "Number of IXP425 serial ports used on the board"
157        flavor       data
158        calculated   { (CYGSEM_HAL_IXP425_PLF_USES_UART1 && CYGSEM_HAL_IXP425_PLF_USES_UART2) ? 2 : \
159                       (CYGSEM_HAL_IXP425_PLF_USES_UART1 || CYGSEM_HAL_IXP425_PLF_USES_UART2) ? 1 : \
160                        0 }
161    }
162 
163    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
164        display      "Number of communication channels on the board"
165        flavor       data
166        calculated   { CYGNUM_HAL_ARM_IXP425_SERIAL_CHANNELS + \
167                       CYGNUM_HAL_IXP425_PLF_SERIAL_CHANNELS }
168    }
169 
170    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
171        display          "Debug serial port"
172        active_if        CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE
173        flavor data
174        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
175        default_value    0
176        description      "
177            This option chooses which port will be used to connect to a host
178            running GDB."
179     }
180 
181     cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {
182         display          "Diagnostic serial port"
183         active_if        CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE
184         flavor data
185         legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
186         default_value    CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT
187         description      "
188            IXP425 boards may use two or more serial ports.  This option
189            chooses which port will be used for diagnostic output."
190     }
191
192    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD {
193        display       "Diagnostic serial port baud rate"
194        flavor        data
195        legal_values  9600 19200 38400 57600 115200
196        default_value 115200
197        description   "
198            This option selects the baud rate used for the diagnostic port.
199            Note: this should match the value chosen for the GDB port if the
200            diagnostic and GDB port are the same."
201    }
202
203    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD {
204        display       "Debug serial port baud rate"
205        flavor        data
206        legal_values  9600 19200 38400 57600 115200
207        default_value 115200
208        description   "
209            This option selects the baud rate used for the GDB port."
210    }
211
212    cdl_component CYGSEM_HAL_IDE_SUPPORT {
213        display       "HAL support for IDE disks"
214        flavor        bool
215        active_if     CYGPKG_IO_PCI
216        default_value 1
217        implements    CYGINT_HAL_PLF_IF_IDE
218        compile       ixp_ide.c
219        description   "
220           Enable this option to get support for IDE devices.  This is useful
221           to allow RedBoot to load files directly from disk."
222    }
223   
224    cdl_component CYGPKG_REDBOOT_XSCALE_OPTIONS {
225        display       "Redboot for XScale options"
226        flavor        none
227        no_define
228        parent        CYGPKG_REDBOOT
229        active_if     CYGPKG_REDBOOT
230        description   "
231            This option lists the target's requirements for a valid Redboot
232            configuration."
233        compile -library=libextras.a ixp425_redboot.c
234
235        define_proc {
236            puts $::cdl_header "#define HAL_FLASH_READ(a,b,c,d) hal_flash_read((a),(b),(c),(d))"
237            puts $::cdl_header "#define HAL_FLASH_PROGRAM(a,b,c,d) hal_flash_program((a),(b),(c),(d))"
238        }
239
240        cdl_option CYGBLD_REDBOOT_IXP4XX_LINUX_EXEC {
241            flavor        none
242            no_define
243            active_if { CYGBLD_BUILD_REDBOOT_WITH_EXEC }
244            requires  { CYGHWR_REDBOOT_ARM_LINUX_EXEC_ADDRESS_DEFAULT != 0 }
245
246            define_proc {
247                puts $::cdl_header "#define CYGHWR_REDBOOT_ARM_TRAMPOLINE_ADDRESS 0x00001f00"
248            }
249        }
250    }
251}
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