source: SVN/cambria/redboot/packages/io/pci/current/src/pci_hw.c @ 1

Last change on this file since 1 was 1, checked in by Tim Harvey, 2 years ago

restored latest version of files from server backup

Signed-off-by: Tim Harvey <tharvey@…>

File size: 4.0 KB
Line 
1//=============================================================================
2//
3//      pci_hw.c
4//
5//      PCI hardware library
6//
7//=============================================================================
8//####ECOSGPLCOPYRIGHTBEGIN####
9// -------------------------------------------
10// This file is part of eCos, the Embedded Configurable Operating System.
11// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12//
13// eCos is free software; you can redistribute it and/or modify it under
14// the terms of the GNU General Public License as published by the Free
15// Software Foundation; either version 2 or (at your option) any later version.
16//
17// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18// WARRANTY; without even the implied warranty of MERCHANTABILITY or
19// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20// for more details.
21//
22// You should have received a copy of the GNU General Public License along
23// with eCos; if not, write to the Free Software Foundation, Inc.,
24// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25//
26// As a special exception, if other files instantiate templates or use macros
27// or inline functions from this file, or you compile this file and link it
28// with other works to produce a work based on this file, this file does not
29// by itself cause the resulting work to be covered by the GNU General Public
30// License. However the source code for this file must still be made available
31// in accordance with section (3) of the GNU General Public License.
32//
33// This exception does not invalidate any other reasons why a work based on
34// this file might be covered by the GNU General Public License.
35//
36// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37// at http://sources.redhat.com/ecos/ecos-license/
38// -------------------------------------------
39//####ECOSGPLCOPYRIGHTEND####
40//=============================================================================
41//#####DESCRIPTIONBEGIN####
42//
43// Author(s):    jskov, from design by nickg
44// Contributors: jskov
45// Date:         1999-08-09
46// Purpose:      PCI hardware configuration access
47// Description:
48//
49//####DESCRIPTIONEND####
50//
51//=============================================================================
52
53#include <pkgconf/hal.h>
54#include <cyg/io/pci_hw.h>
55
56// CYG_PCI_PRESENT only gets defined for targets that provide PCI HAL support.
57// See pci_hw.h for details.
58#ifdef CYG_PCI_PRESENT
59
60// Init
61void 
62cyg_pcihw_init(void)
63{
64    HAL_PCI_INIT();
65}
66
67// Read functions
68void 
69cyg_pcihw_read_config_uint8( cyg_uint8 bus, cyg_uint8 devfn, 
70                             cyg_uint8 offset, cyg_uint8 *val)
71{
72    HAL_PCI_CFG_READ_UINT8(bus, devfn, offset, *val);
73}
74
75void 
76cyg_pcihw_read_config_uint16( cyg_uint8 bus, cyg_uint8 devfn, 
77                              cyg_uint8 offset, cyg_uint16 *val)
78{
79    HAL_PCI_CFG_READ_UINT16(bus, devfn, offset, *val);
80}
81
82void
83cyg_pcihw_read_config_uint32( cyg_uint8 bus, cyg_uint8 devfn, 
84                              cyg_uint8 offset, cyg_uint32 *val)
85{
86    HAL_PCI_CFG_READ_UINT32(bus, devfn, offset, *val);
87}
88
89// Write functions
90void 
91cyg_pcihw_write_config_uint8( cyg_uint8 bus, cyg_uint8 devfn, 
92                             cyg_uint8 offset, cyg_uint8 val)
93{
94    HAL_PCI_CFG_WRITE_UINT8(bus, devfn, offset, val);
95}
96
97void 
98cyg_pcihw_write_config_uint16( cyg_uint8 bus, cyg_uint8 devfn, 
99                              cyg_uint8 offset, cyg_uint16 val)
100{
101    HAL_PCI_CFG_WRITE_UINT16(bus, devfn, offset, val);
102}
103
104void
105cyg_pcihw_write_config_uint32( cyg_uint8 bus, cyg_uint8 devfn, 
106                              cyg_uint8 offset, cyg_uint32 val)
107{
108    HAL_PCI_CFG_WRITE_UINT32(bus, devfn, offset, val);
109}
110
111// Interrupt translation
112cyg_bool
113cyg_pcihw_translate_interrupt( cyg_uint8 bus, cyg_uint8 devfn,
114                               CYG_ADDRWORD *vec)
115{
116    cyg_bool valid;
117
118    HAL_PCI_TRANSLATE_INTERRUPT(bus, devfn, *vec, valid);
119
120    return valid;
121}
122
123#endif // ifdef CYG_PCI_PRESENT
124
125//-----------------------------------------------------------------------------
126// end of pci_hw.c
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