1 | /* |
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2 | * (C) Copyright 2007 |
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3 | * Michael Schwingen, michael@schwingen.org |
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4 | * |
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5 | * (C) Copyright 2006 |
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6 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
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7 | * |
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8 | * (C) Copyright 2002 |
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9 | * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net |
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10 | * |
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11 | * (C) Copyright 2002 |
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12 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
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13 | * Marius Groeger <mgroeger@sysgo.de> |
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14 | * |
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15 | * See file CREDITS for list of people who contributed to this |
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16 | * project. |
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17 | * |
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18 | * This program is free software; you can redistribute it and/or |
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19 | * modify it under the terms of the GNU General Public License as |
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20 | * published by the Free Software Foundation; either version 2 of |
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21 | * the License, or (at your option) any later version. |
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22 | * |
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23 | * This program is distributed in the hope that it will be useful, |
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24 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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26 | * GNU General Public License for more details. |
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27 | * |
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28 | * You should have received a copy of the GNU General Public License |
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29 | * along with this program; if not, write to the Free Software |
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30 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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31 | * MA 02111-1307 USA |
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32 | */ |
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33 | |
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34 | #include <common.h> |
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35 | #include <command.h> |
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36 | #include <malloc.h> |
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37 | #include <asm/arch/ixp425.h> |
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38 | #include <asm/io.h> |
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39 | |
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40 | #include <miiphy.h> |
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41 | |
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42 | #include "actux2_hw.h" |
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43 | |
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44 | DECLARE_GLOBAL_DATA_PTR; |
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45 | |
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46 | int board_init (void) |
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47 | { |
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48 | gd->bd->bi_arch_number = MACH_TYPE_ACTUX2; |
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49 | |
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50 | /* adress of boot parameters */ |
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51 | gd->bd->bi_boot_params = 0x00000100; |
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52 | |
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53 | GPIO_OUTPUT_ENABLE (CFG_GPIO_IORST); |
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54 | GPIO_OUTPUT_ENABLE (CFG_GPIO_ETHRST); |
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55 | GPIO_OUTPUT_ENABLE (CFG_GPIO_DSR); |
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56 | GPIO_OUTPUT_ENABLE (CFG_GPIO_DCD); |
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57 | |
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58 | GPIO_OUTPUT_CLEAR (CFG_GPIO_IORST); |
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59 | GPIO_OUTPUT_CLEAR (CFG_GPIO_ETHRST); |
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60 | |
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61 | GPIO_OUTPUT_CLEAR (CFG_GPIO_DSR); |
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62 | GPIO_OUTPUT_SET (CFG_GPIO_DCD); |
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63 | |
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64 | /* Setup GPIO's for Interrupt inputs */ |
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65 | GPIO_OUTPUT_DISABLE (CFG_GPIO_DBGINT); |
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66 | GPIO_OUTPUT_DISABLE (CFG_GPIO_ETHINT); |
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67 | |
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68 | /* Setup GPIO's for 33MHz clock output */ |
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69 | GPIO_OUTPUT_ENABLE (CFG_GPIO_PCI_CLK); |
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70 | GPIO_OUTPUT_ENABLE (CFG_GPIO_EXTBUS_CLK); |
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71 | *IXP425_GPIO_GPCLKR = 0x011001FF; |
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72 | |
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73 | /* CS1: IPAC-X */ |
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74 | *IXP425_EXP_CS1 = 0x94d10013; |
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75 | /* CS5: Debug port */ |
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76 | *IXP425_EXP_CS5 = 0x9d520003; |
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77 | /* CS6: HW release register */ |
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78 | *IXP425_EXP_CS6 = 0x81860001; |
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79 | /* CS7: LEDs */ |
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80 | *IXP425_EXP_CS7 = 0x80900003; |
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81 | |
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82 | udelay (533); |
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83 | GPIO_OUTPUT_SET (CFG_GPIO_IORST); |
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84 | GPIO_OUTPUT_SET (CFG_GPIO_ETHRST); |
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85 | |
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86 | ACTUX2_LED1 (1); |
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87 | ACTUX2_LED2 (0); |
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88 | ACTUX2_LED3 (0); |
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89 | ACTUX2_LED4 (0); |
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90 | |
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91 | return 0; |
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92 | } |
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93 | |
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94 | /* |
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95 | * Check Board Identity |
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96 | */ |
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97 | int checkboard (void) |
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98 | { |
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99 | char *s = getenv ("serial#"); |
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100 | |
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101 | puts ("Board: AcTux-2 rev."); |
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102 | putc (ACTUX2_BOARDREL + 'A' - 1); |
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103 | |
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104 | if (s != NULL) { |
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105 | puts (", serial# "); |
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106 | puts (s); |
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107 | } |
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108 | putc ('\n'); |
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109 | |
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110 | return (0); |
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111 | } |
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112 | |
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113 | int dram_init (void) |
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114 | { |
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115 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
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116 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
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117 | |
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118 | return (0); |
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119 | } |
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120 | |
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121 | /************************************************************************* |
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122 | * get_board_rev() - setup to pass kernel board revision information |
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123 | * 0 = reserved |
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124 | * 1 = Rev. A |
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125 | * 2 = Rev. B |
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126 | *************************************************************************/ |
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127 | u32 get_board_rev (void) |
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128 | { |
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129 | return ACTUX2_BOARDREL; |
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130 | } |
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131 | |
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132 | void reset_phy (void) |
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133 | { |
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134 | /* init IcPlus IP175C ethernet switch to native IP175C mode */ |
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135 | miiphy_write ("NPE0", 29, 31, 0x175C); |
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136 | } |
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