1 | /* |
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2 | * (C) Copyright 2004-2005 |
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3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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4 | * |
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5 | * (C) Copyright 2002 Jun Gu <jung@artesyncp.com> |
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6 | * Add support for Am29F016D and dynamic switch setting. |
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7 | * |
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8 | * See file CREDITS for list of people who contributed to this |
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9 | * project. |
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10 | * |
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11 | * This program is free software; you can redistribute it and/or |
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12 | * modify it under the terms of the GNU General Public License as |
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13 | * published by the Free Software Foundation; either version 2 of |
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14 | * the License, or (at your option) any later version. |
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15 | * |
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16 | * This program is distributed in the hope that it will be useful, |
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17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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19 | * GNU General Public License for more details. |
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20 | * |
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21 | * You should have received a copy of the GNU General Public License |
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22 | * along with this program; if not, write to the Free Software |
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23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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24 | * MA 02111-1307 USA |
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25 | */ |
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26 | |
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27 | /* |
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28 | * Modified 4/5/2001 |
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29 | * Wait for completion of each sector erase command issued |
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30 | * 4/5/2001 |
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31 | * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com |
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32 | */ |
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33 | |
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34 | #include <common.h> |
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35 | #include <ppc4xx.h> |
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36 | #include <asm/processor.h> |
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37 | #include <ppc440.h> |
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38 | #include "bamboo.h" |
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39 | |
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40 | #undef DEBUG |
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41 | |
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42 | #ifdef DEBUG |
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43 | #define DEBUGF(x...) printf(x) |
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44 | #else |
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45 | #define DEBUGF(x...) |
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46 | #endif /* DEBUG */ |
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47 | |
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48 | flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
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49 | |
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50 | /* |
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51 | * Mark big flash bank (16 bit instead of 8 bit access) in address with bit 0 |
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52 | */ |
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53 | static unsigned long flash_addr_table[][CFG_MAX_FLASH_BANKS] = { |
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54 | {0x87800001, 0xFFF00000, 0xFFF80000}, /* 0:boot from small flash */ |
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55 | {0x00000000, 0x00000000, 0x00000000}, /* 1:boot from pci 66 */ |
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56 | {0x87800001, 0x00000000, 0x00000000}, /* 0:boot from nand flash */ |
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57 | {0x87F00000, 0x87F80000, 0xFFC00001}, /* 3:boot from big flash 33*/ |
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58 | {0x87F00000, 0x87F80000, 0xFFC00001}, /* 4:boot from big flash 66*/ |
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59 | {0x00000000, 0x00000000, 0x00000000}, /* 5:boot from */ |
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60 | {0x00000000, 0x00000000, 0x00000000}, /* 6:boot from pci 66 */ |
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61 | {0x00000000, 0x00000000, 0x00000000}, /* 7:boot from */ |
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62 | {0x87C00001, 0xFFF00000, 0xFFF80000}, /* 0:boot from small flash */ |
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63 | }; |
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64 | |
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65 | /* |
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66 | * include common flash code (for amcc boards) |
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67 | */ |
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68 | #include "../common/flash.c" |
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69 | |
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70 | /*----------------------------------------------------------------------- |
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71 | * Functions |
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72 | */ |
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73 | static ulong flash_get_size(vu_long * addr, flash_info_t * info); |
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74 | static int write_word(flash_info_t * info, ulong dest, ulong data); |
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75 | |
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76 | /*----------------------------------------------------------------------- |
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77 | */ |
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78 | |
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79 | unsigned long flash_init(void) |
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80 | { |
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81 | unsigned long total_b = 0; |
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82 | unsigned long size_b[CFG_MAX_FLASH_BANKS]; |
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83 | unsigned short index = 0; |
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84 | int i; |
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85 | unsigned long val; |
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86 | unsigned long ebc_boot_size; |
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87 | unsigned long boot_selection; |
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88 | |
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89 | mfsdr(sdr_pstrp0, val); |
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90 | index = (val & SDR0_PSTRP0_BOOTSTRAP_MASK) >> 29; |
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91 | |
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92 | if ((index == 5) || (index == 7)) { |
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93 | /* |
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94 | * Boot Settings in IIC EEprom address 0xA8 or 0xA4 |
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95 | * Read Serial Device Strap Register1 in PPC440EP |
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96 | */ |
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97 | mfsdr(sdr_sdstp1, val); |
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98 | boot_selection = val & SDR0_SDSTP1_BOOT_SEL_MASK; |
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99 | ebc_boot_size = val & SDR0_SDSTP1_EBC_ROM_BS_MASK; |
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100 | |
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101 | switch(boot_selection) { |
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102 | case SDR0_SDSTP1_BOOT_SEL_EBC: |
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103 | switch(ebc_boot_size) { |
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104 | case SDR0_SDSTP1_EBC_ROM_BS_16BIT: |
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105 | index = 3; |
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106 | break; |
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107 | case SDR0_SDSTP1_EBC_ROM_BS_8BIT: |
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108 | index = 0; |
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109 | break; |
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110 | } |
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111 | break; |
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112 | |
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113 | case SDR0_SDSTP1_BOOT_SEL_PCI: |
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114 | index = 1; |
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115 | break; |
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116 | |
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117 | case SDR0_SDSTP1_BOOT_SEL_NDFC: |
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118 | index = 2; |
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119 | break; |
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120 | } |
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121 | } else if (index == 0) { |
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122 | if (in8(FPGA_SETTING_REG) & FPGA_SET_REG_OP_CODE_FLASH_ABOVE) { |
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123 | index = 8; /* sram below op code flash -> new index 8 */ |
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124 | } |
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125 | } |
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126 | |
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127 | DEBUGF("\n"); |
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128 | DEBUGF("FLASH: Index: %d\n", index); |
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129 | |
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130 | /* Init: no FLASHes known */ |
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131 | for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { |
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132 | flash_info[i].flash_id = FLASH_UNKNOWN; |
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133 | flash_info[i].sector_count = -1; |
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134 | flash_info[i].size = 0; |
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135 | |
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136 | /* check whether the address is 0 */ |
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137 | if (flash_addr_table[index][i] == 0) |
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138 | continue; |
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139 | |
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140 | DEBUGF("Detection bank %d...\n", i); |
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141 | /* call flash_get_size() to initialize sector address */ |
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142 | size_b[i] = flash_get_size((vu_long *) flash_addr_table[index][i], |
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143 | &flash_info[i]); |
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144 | flash_info[i].size = size_b[i]; |
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145 | if (flash_info[i].flash_id == FLASH_UNKNOWN) { |
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146 | printf("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", |
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147 | i, size_b[i], size_b[i] << 20); |
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148 | flash_info[i].sector_count = -1; |
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149 | flash_info[i].size = 0; |
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150 | } |
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151 | |
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152 | /* Monitor protection ON by default */ |
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153 | (void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE, |
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154 | CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, |
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155 | &flash_info[i]); |
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156 | #if defined(CONFIG_ENV_IS_IN_FLASH) |
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157 | (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR, |
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158 | CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, |
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159 | &flash_info[i]); |
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160 | #if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR_REDUND) |
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161 | (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR_REDUND, |
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162 | CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, |
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163 | &flash_info[i]); |
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164 | #endif |
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165 | #endif |
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166 | |
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167 | total_b += flash_info[i].size; |
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168 | } |
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169 | |
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170 | return total_b; |
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171 | } |
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