source: SVN/rincon/u-boot/board/atmel/atngw100/atngw100.c @ 55

Last change on this file since 55 was 55, checked in by Tim Harvey, 2 years ago

rincon: added latest u-boot source

restored form server backup

Signed-off-by: Tim Harvey <tharvey@…>

File size: 2.9 KB
Line 
1/*
2 * Copyright (C) 2006 Atmel Corporation
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22#include <common.h>
23
24#include <asm/io.h>
25#include <asm/sdram.h>
26#include <asm/arch/clk.h>
27#include <asm/arch/gpio.h>
28#include <asm/arch/hmatrix.h>
29#include <netdev.h>
30
31DECLARE_GLOBAL_DATA_PTR;
32
33static const struct sdram_config sdram_config = {
34        .data_bits      = SDRAM_DATA_16BIT,
35        .row_bits       = 13,
36        .col_bits       = 9,
37        .bank_bits      = 2,
38        .cas            = 3,
39        .twr            = 2,
40        .trc            = 7,
41        .trp            = 2,
42        .trcd           = 2,
43        .tras           = 5,
44        .txsr           = 5,
45        /* 7.81 us */
46        .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
47};
48
49int board_early_init_f(void)
50{
51        /* Enable SDRAM in the EBI mux */
52        hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
53
54        gpio_enable_ebi();
55        gpio_enable_usart1();
56
57#if defined(CONFIG_MACB)
58        gpio_enable_macb0();
59        gpio_enable_macb1();
60#endif
61#if defined(CONFIG_MMC)
62        gpio_enable_mmci();
63#endif
64#if defined(CONFIG_ATMEL_SPI)
65        gpio_enable_spi0(1 << 0);
66#endif
67
68        return 0;
69}
70
71phys_size_t initdram(int board_type)
72{
73        unsigned long expected_size;
74        unsigned long actual_size;
75        void *sdram_base;
76
77        sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
78
79        expected_size = sdram_init(sdram_base, &sdram_config);
80        actual_size = get_ram_size(sdram_base, expected_size);
81
82        unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
83
84        if (expected_size != actual_size)
85                printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
86                                actual_size >> 20, expected_size >> 20);
87
88        return actual_size;
89}
90
91void board_init_info(void)
92{
93        gd->bd->bi_phy_id[0] = 0x01;
94        gd->bd->bi_phy_id[1] = 0x03;
95}
96
97#ifdef CONFIG_CMD_NET
98int board_eth_init(bd_t *bi)
99{
100        macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
101        macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
102        return 0;
103}
104#endif
105
106/* SPI chip select control */
107#ifdef CONFIG_ATMEL_SPI
108#include <spi.h>
109
110#define ATNGW100_DATAFLASH_CS_PIN       GPIO_PIN_PA3
111
112int spi_cs_is_valid(unsigned int bus, unsigned int cs)
113{
114        return bus == 0 && cs == 0;
115}
116
117void spi_cs_activate(struct spi_slave *slave)
118{
119        gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
120}
121
122void spi_cs_deactivate(struct spi_slave *slave)
123{
124        gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
125}
126#endif /* CONFIG_ATMEL_SPI */
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