1 | /* |
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2 | * U-boot - u-boot.lds.S |
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3 | * |
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4 | * Copyright (c) 2005-2008 Analog Device Inc. |
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5 | * |
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6 | * (C) Copyright 2000-2004 |
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7 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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8 | * |
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9 | * See file CREDITS for list of people who contributed to this |
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10 | * project. |
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11 | * |
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12 | * This program is free software; you can redistribute it and/or |
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13 | * modify it under the terms of the GNU General Public License as |
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14 | * published by the Free Software Foundation; either version 2 of |
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15 | * the License, or (at your option) any later version. |
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16 | * |
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17 | * This program is distributed in the hope that it will be useful, |
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18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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20 | * GNU General Public License for more details. |
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21 | * |
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22 | * You should have received a copy of the GNU General Public License |
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23 | * along with this program; if not, write to the Free Software |
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24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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25 | * MA 02111-1307 USA |
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26 | */ |
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27 | |
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28 | #include <config.h> |
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29 | #include <asm/blackfin.h> |
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30 | #undef ALIGN |
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31 | |
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32 | /* If we don't actually load anything into L1 data, this will avoid |
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33 | * a syntax error. If we do actually load something into L1 data, |
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34 | * we'll get a linker memory load error (which is what we'd want). |
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35 | * This is here in the first place so we can quickly test building |
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36 | * for different CPU's which may lack non-cache L1 data. |
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37 | */ |
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38 | #ifndef L1_DATA_B_SRAM |
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39 | # define L1_DATA_B_SRAM CFG_MONITOR_BASE |
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40 | # define L1_DATA_B_SRAM_SIZE 0 |
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41 | #endif |
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42 | |
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43 | OUTPUT_ARCH(bfin) |
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44 | |
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45 | /* The 0xC offset is so we don't clobber the tiny LDR jump block. */ |
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46 | MEMORY |
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47 | { |
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48 | ram : ORIGIN = CFG_MONITOR_BASE, LENGTH = CFG_MONITOR_LEN |
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49 | l1_code : ORIGIN = L1_INST_SRAM+0xC, LENGTH = L1_INST_SRAM_SIZE |
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50 | l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE |
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51 | } |
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52 | |
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53 | SECTIONS |
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54 | { |
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55 | .text : |
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56 | { |
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57 | #ifdef ENV_IS_EMBEDDED |
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58 | /* WARNING - the following is hand-optimized to fit within |
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59 | * the sector before the environment sector. If it throws |
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60 | * an error during compilation remove an object here to get |
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61 | * it linked after the configuration sector. |
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62 | */ |
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63 | |
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64 | cpu/blackfin/start.o (.text) |
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65 | cpu/blackfin/traps.o (.text) |
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66 | cpu/blackfin/interrupt.o (.text) |
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67 | cpu/blackfin/serial.o (.text) |
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68 | common/dlmalloc.o (.text) |
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69 | lib_generic/crc32.o (.text) |
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70 | |
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71 | . = DEFINED(env_offset) ? env_offset : .; |
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72 | common/env_embedded.o (.text) |
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73 | #endif |
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74 | |
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75 | *(.text .text.*) |
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76 | } >ram |
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77 | |
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78 | .rodata : |
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79 | { |
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80 | . = ALIGN(4); |
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81 | *(.rodata .rodata.*) |
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82 | *(.rodata1) |
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83 | *(.eh_frame) |
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84 | . = ALIGN(4); |
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85 | } >ram |
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86 | |
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87 | .data : |
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88 | { |
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89 | . = ALIGN(256); |
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90 | *(.data .data.*) |
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91 | *(.data1) |
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92 | *(.sdata) |
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93 | *(.sdata2) |
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94 | *(.dynamic) |
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95 | CONSTRUCTORS |
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96 | } >ram |
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97 | |
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98 | .u_boot_cmd : |
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99 | { |
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100 | ___u_boot_cmd_start = .; |
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101 | *(.u_boot_cmd) |
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102 | ___u_boot_cmd_end = .; |
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103 | } >ram |
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104 | |
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105 | .text_l1 : |
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106 | { |
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107 | . = ALIGN(4); |
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108 | __stext_l1 = .; |
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109 | *(.l1.text) |
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110 | . = ALIGN(4); |
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111 | __etext_l1 = .; |
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112 | } >l1_code AT>ram |
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113 | __stext_l1_lma = LOADADDR(.text_l1); |
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114 | |
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115 | .data_l1 : |
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116 | { |
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117 | . = ALIGN(4); |
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118 | __sdata_l1 = .; |
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119 | *(.l1.data) |
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120 | *(.l1.bss) |
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121 | . = ALIGN(4); |
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122 | __edata_l1 = .; |
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123 | } >l1_data AT>ram |
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124 | __sdata_l1_lma = LOADADDR(.data_l1); |
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125 | |
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126 | .bss : |
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127 | { |
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128 | . = ALIGN(4); |
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129 | __bss_start = .; |
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130 | *(.sbss) *(.scommon) |
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131 | *(.dynbss) |
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132 | *(.bss .bss.*) |
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133 | *(COMMON) |
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134 | __bss_end = .; |
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135 | } >ram |
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136 | } |
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