source: SVN/rincon/u-boot/board/esd/common/esd405ep_nand.c @ 55

Last change on this file since 55 was 55, checked in by Tim Harvey, 2 years ago

rincon: added latest u-boot source

restored form server backup

Signed-off-by: Tim Harvey <tharvey@…>

File size: 2.4 KB
Line 
1/*
2 * (C) Copyright 2007
3 * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25
26#if defined(CONFIG_CMD_NAND)
27#include <asm/io.h>
28#include <nand.h>
29
30/*
31 * hardware specific access to control-lines
32 */
33static void esd405ep_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
34{
35        struct nand_chip *this = mtd->priv;
36        if (ctrl & NAND_CTRL_CHANGE) {
37                if ( ctrl & NAND_CLE )
38                        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CLE);
39                else
40                        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_CLE);
41                if ( ctrl & NAND_ALE )
42                        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_ALE);
43                else
44                        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_ALE);
45                if ( ctrl & NAND_NCE )
46                        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_CE);
47                else
48                        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CE);
49        }
50
51        if (cmd != NAND_CMD_NONE)
52                writeb(cmd, this->IO_ADDR_W);
53}
54
55
56/*
57 * read device ready pin
58 */
59static int esd405ep_nand_device_ready(struct mtd_info *mtdinfo)
60{
61        if (in_be32((void *)GPIO0_IR) & CFG_NAND_RDY)
62                return 1;
63        return 0;
64}
65
66
67int board_nand_init(struct nand_chip *nand)
68{
69        /*
70         * Set NAND-FLASH GPIO signals to defaults
71         */
72        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
73        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CE);
74
75        /*
76         * Initialize nand_chip structure
77         */
78        nand->cmd_ctrl = esd405ep_nand_hwcontrol;
79        nand->dev_ready = esd405ep_nand_device_ready;
80        nand->ecc.mode = NAND_ECC_SOFT;
81        nand->chip_delay = NAND_BIG_DELAY_US;
82        nand->options = NAND_SAMSUNG_LP_OPTIONS;
83        return 0;
84}
85#endif
Note: See TracBrowser for help on using the repository browser.