| 1 | /* |
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| 2 | * (C) Copyright 2007 |
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| 3 | * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com |
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| 4 | * |
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| 5 | * See file CREDITS for list of people who contributed to this |
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| 6 | * project. |
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| 7 | * |
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| 8 | * This program is free software; you can redistribute it and/or |
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| 9 | * modify it under the terms of the GNU General Public License as |
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| 10 | * published by the Free Software Foundation; either version 2 of |
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| 11 | * the License, or (at your option) any later version. |
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| 12 | * |
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| 13 | * This program is distributed in the hope that it will be useful, |
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| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 16 | * GNU General Public License for more details. |
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| 17 | * |
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| 18 | * You should have received a copy of the GNU General Public License |
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| 19 | * along with this program; if not, write to the Free Software |
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| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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| 21 | * MA 02111-1307 USA |
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| 22 | */ |
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| 23 | |
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| 24 | #include <common.h> |
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| 25 | |
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| 26 | #if defined(CONFIG_CMD_NAND) |
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| 27 | #include <asm/io.h> |
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| 28 | #include <nand.h> |
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| 29 | |
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| 30 | /* |
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| 31 | * hardware specific access to control-lines |
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| 32 | */ |
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| 33 | static void esd405ep_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) |
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| 34 | { |
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| 35 | struct nand_chip *this = mtd->priv; |
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| 36 | if (ctrl & NAND_CTRL_CHANGE) { |
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| 37 | if ( ctrl & NAND_CLE ) |
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| 38 | out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CLE); |
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| 39 | else |
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| 40 | out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_CLE); |
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| 41 | if ( ctrl & NAND_ALE ) |
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| 42 | out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_ALE); |
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| 43 | else |
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| 44 | out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_ALE); |
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| 45 | if ( ctrl & NAND_NCE ) |
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| 46 | out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_CE); |
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| 47 | else |
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| 48 | out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CE); |
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| 49 | } |
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| 50 | |
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| 51 | if (cmd != NAND_CMD_NONE) |
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| 52 | writeb(cmd, this->IO_ADDR_W); |
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| 53 | } |
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| 54 | |
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| 55 | |
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| 56 | /* |
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| 57 | * read device ready pin |
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| 58 | */ |
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| 59 | static int esd405ep_nand_device_ready(struct mtd_info *mtdinfo) |
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| 60 | { |
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| 61 | if (in_be32((void *)GPIO0_IR) & CFG_NAND_RDY) |
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| 62 | return 1; |
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| 63 | return 0; |
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| 64 | } |
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| 65 | |
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| 66 | |
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| 67 | int board_nand_init(struct nand_chip *nand) |
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| 68 | { |
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| 69 | /* |
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| 70 | * Set NAND-FLASH GPIO signals to defaults |
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| 71 | */ |
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| 72 | out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE)); |
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| 73 | out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CE); |
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| 74 | |
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| 75 | /* |
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| 76 | * Initialize nand_chip structure |
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| 77 | */ |
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| 78 | nand->cmd_ctrl = esd405ep_nand_hwcontrol; |
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| 79 | nand->dev_ready = esd405ep_nand_device_ready; |
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| 80 | nand->ecc.mode = NAND_ECC_SOFT; |
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| 81 | nand->chip_delay = NAND_BIG_DELAY_US; |
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| 82 | nand->options = NAND_SAMSUNG_LP_OPTIONS; |
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| 83 | return 0; |
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| 84 | } |
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| 85 | #endif |
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