source: SVN/rincon/u-boot/board/esd/ocrtc/ocrtc.c @ 55

Last change on this file since 55 was 55, checked in by Tim Harvey, 22 months ago

rincon: added latest u-boot source

restored form server backup

Signed-off-by: Tim Harvey <tharvey@…>

File size: 2.6 KB
Line 
1/*
2 * (C) Copyright 2001
3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include "ocrtc.h"
26#include <asm/processor.h>
27#include <i2c.h>
28#include <command.h>
29
30
31extern void lxt971_no_sleep(void);
32
33
34int board_early_init_f (void)
35{
36        /*
37         * IRQ 0-15  405GP internally generated; active high; level sensitive
38         * IRQ 16    405GP internally generated; active low; level sensitive
39         * IRQ 17-24 RESERVED
40         * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
41         * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
42         * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
43         * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
44         * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
45         * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
46         * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
47         */
48        mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
49        mtdcr (uicer, 0x00000000);      /* disable all ints */
50        mtdcr (uiccr, 0x00000000);      /* set all to be non-critical */
51        mtdcr (uicpr, 0xFFFFFF81);      /* set int polarities */
52        mtdcr (uictr, 0x10000000);      /* set int trigger levels */
53        mtdcr (uicvcr, 0x00000001);     /* set vect base=0,INT0 highest priority */
54        mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
55
56        /*
57         * EBC Configuration Register: clear EBTC -> high-Z ebc signals between
58         * transfers, set device-paced timeout to 256 cycles
59         */
60        mtebc (epcr, 0x20400000);
61
62        return 0;
63}
64
65/*
66 * Check Board Identity:
67 */
68int checkboard (void)
69{
70        char str[64];
71        int i = getenv_r ("serial#", str, sizeof (str));
72
73        puts ("Board: ");
74
75        if (i == -1) {
76#ifdef CONFIG_OCRTC
77                puts ("### No HW ID - assuming OCRTC");
78#endif
79#ifdef CONFIG_ORSG
80                puts ("### No HW ID - assuming ORSG");
81#endif
82        } else {
83                puts (str);
84        }
85
86        putc ('\n');
87
88        /*
89         * Disable sleep mode in LXT971
90         */
91        lxt971_no_sleep();
92
93        return (0);
94}
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