source: SVN/rincon/u-boot/board/freescale/mpc8536ds/tlb.c @ 55

Last change on this file since 55 was 55, checked in by Tim Harvey, 22 months ago

rincon: added latest u-boot source

restored form server backup

Signed-off-by: Tim Harvey <tharvey@…>

File size: 2.5 KB
Line 
1/*
2 * Copyright 2008 Freescale Semiconductor, Inc.
3 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <asm/mmu.h>
28
29struct fsl_e_tlb_entry tlb_table[] = {
30        /* TLB 0 - for temp stack in cache */
31        SET_TLB_ENTRY(0, CFG_INIT_RAM_ADDR, CFG_INIT_RAM_ADDR,
32                      MAS3_SX|MAS3_SW|MAS3_SR, 0,
33                      0, 0, BOOKE_PAGESZ_4K, 0),
34        SET_TLB_ENTRY(0, CFG_INIT_RAM_ADDR + 4 * 1024 , CFG_INIT_RAM_ADDR + 4 * 1024,
35                      MAS3_SX|MAS3_SW|MAS3_SR, 0,
36                      0, 0, BOOKE_PAGESZ_4K, 0),
37        SET_TLB_ENTRY(0, CFG_INIT_RAM_ADDR + 8 * 1024 , CFG_INIT_RAM_ADDR + 8 * 1024,
38                      MAS3_SX|MAS3_SW|MAS3_SR, 0,
39                      0, 0, BOOKE_PAGESZ_4K, 0),
40        SET_TLB_ENTRY(0, CFG_INIT_RAM_ADDR + 12 * 1024 , CFG_INIT_RAM_ADDR + 12 * 1024,
41                      MAS3_SX|MAS3_SW|MAS3_SR, 0,
42                      0, 0, BOOKE_PAGESZ_4K, 0),
43
44        SET_TLB_ENTRY(0, PIXIS_BASE, PIXIS_BASE,
45                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
46                      0, 0, BOOKE_PAGESZ_4K, 0),
47
48        /* TLB 1 */
49        /* *I*G* - CCSRBAR */
50        SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
51                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
52                      0, 0, BOOKE_PAGESZ_1M, 1),
53
54        /* W**G* - Flash/promjet, localbus */
55        /* This will be changed to *I*G* after relocation to RAM. */
56        SET_TLB_ENTRY(1, CFG_FLASH_BASE, CFG_FLASH_BASE,
57                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G,
58                      0, 1, BOOKE_PAGESZ_256M, 1),
59
60        /* *I*G* - PCI */
61        SET_TLB_ENTRY(1, CFG_PCI1_MEM_PHYS, CFG_PCI1_MEM_PHYS,
62                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
63                      0, 2, BOOKE_PAGESZ_1G, 1),
64
65        /* *I*G* - PCI I/O */
66        SET_TLB_ENTRY(1, CFG_PCI1_IO_PHYS, CFG_PCI1_IO_PHYS,
67                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
68                      0, 3, BOOKE_PAGESZ_256K, 1),
69};
70
71int num_tlb_entries = ARRAY_SIZE(tlb_table);
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