source: SVN/rincon/u-boot/board/netstal/hcu4/README.txt @ 55

Last change on this file since 55 was 55, checked in by Tim Harvey, 22 months ago

rincon: added latest u-boot source

restored form server backup

Signed-off-by: Tim Harvey <tharvey@…>

File size: 1.3 KB
Line 
1HCU4 Configuration Details
2
3Memory Bank 0 -- Flash chip
4---------------------------
5
60xfff00000 - 0xffffffff
7
8The flash chip is really only 512Kbytes, but the high address bit of
9the 1Meg region is ignored, so the flash is replicated through the
10region. Thus, this is consistent with a flash base address 0xfff80000.
11
12The placement at the end is to be consistent with reset behavior,
13where the processor itself initially uses this bus to load the branch
14vector and start running.
15
16On-Chip Memory
17--------------
18
190xf4000000 - 0xf4000fff
20
21The 405GPr includes a 4K on-chip memory that can be placed however
22software chooses. I choose to place the memory at this address, to
23keep it out of the cachable areas.
24
25
26Internal Peripherals
27--------------------
28
290xef600300 - 0xef6008ff
30
31These are scattered various peripherals internal to the PPC405GPr
32chip.
33
34Chip-Select 2: Flash Memory
35---------------------------
36
370x70000000
38
39Chip-Select 3: CAN Interface
40----------------------------
410x7800000
42
43
44Chip-Select 4: IMC-bus standard
45-------------------------------
46
47Our IO-Bus (slow version)
48
49
50Chip-Select 5: IMC-bus fast (inactive)
51--------------------------------------
52
53Our IO-Bus (fast, but not yet use)
54
55
56Memory Bank 1 -- SDRAM
57-------------------------------------
58
590x00000000 - 0x1ffffff   # Default 32 MB
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