source: SVN/rincon/u-boot/board/sx1/sx1.c @ 55

Last change on this file since 55 was 55, checked in by Tim Harvey, 22 months ago

rincon: added latest u-boot source

restored form server backup

Signed-off-by: Tim Harvey <tharvey@…>

File size: 3.3 KB
Line 
1/*
2 * (C) Copyright 2004
3 * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
4 *
5 * (C) Copyright 2003
6 * Texas Instruments, <www.ti.com>
7 * Kshitij Gupta <Kshitij@ti.com>
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29
30DECLARE_GLOBAL_DATA_PTR;
31
32static void flash__init (void);
33static void ether__init (void);
34
35static inline void delay (unsigned long loops)
36{
37        __asm__ volatile ("1:\n"
38                          "subs %0, %1, #1\n"
39                          "bne 1b":"=r" (loops):"0" (loops));
40}
41
42/*
43 * Miscellaneous platform dependent initialisations
44 */
45
46int board_init (void)
47{
48        /* arch number of SX1 Board */
49        gd->bd->bi_arch_number = MACH_TYPE_SX1;
50
51        /* adress of boot parameters */
52        gd->bd->bi_boot_params = 0x10000100;
53
54/* kk - this speeds up your boot a quite a bit.  However to make it
55 *  work, you need make sure your kernel startup flush bug is fixed.
56 *  ... rkw ...
57 */
58        icache_enable ();
59
60        flash__init ();
61        ether__init ();
62        return 0;
63}
64
65
66int misc_init_r (void)
67{
68        /* volatile ushort *gdir = (ushort *) (GPIO_DIR_CONTROL_REG); */
69        /* volatile ushort *mdir = (ushort *) (MPUIO_DIR_CONTROL_REG); */
70
71        /* setup gpio direction to match board (no floats!) */
72        /**gdir = 0xCFF9; */
73        /**mdir = 0x103F; */
74
75        return (0);
76}
77
78/******************************
79 Routine:
80 Description:
81******************************/
82static void flash__init (void)
83{
84#define CS0_CHIP_SELECT_REG 0xfffecc10
85#define CS3_CHIP_SELECT_REG 0xfffecc1c
86#define EMIFS_GlB_Config_REG 0xfffecc0c
87
88        unsigned int regval;
89
90        regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
91        regval = regval | 0x0001;       /* Turn off write protection for flash devices. */
92        if (regval & 0x0002) {
93                regval = regval & 0xfffd;       /* Swap CS0 and CS3 so that flash is visible at 0x0 and eeprom at 0x0c000000. */
94                /* If, instead, you want to reference flash at 0x0c000000, then it seemed the following were necessary. */
95                /* *((volatile unsigned int *)CS0_CHIP_SELECT_REG) = 0x202090; / * Overrides head.S setting of 0x212090 */
96                /* *((volatile unsigned int *)CS3_CHIP_SELECT_REG) = 0x202090; / * Let's flash chips be fully functional. */
97        }
98        *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
99}
100
101
102/******************************
103 Routine:
104 Description:
105******************************/
106static void ether__init (void)
107{
108#define ETH_CONTROL_REG 0x0800000b
109        /* take the Ethernet controller out of reset and wait
110         * for the EEPROM load to complete.
111         */
112        *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
113        udelay (3);
114}
115
116
117int dram_init (void)
118{
119        gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
120        gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
121
122        return 0;
123}
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