source: SVN/rincon/u-boot/board/xilinx/xilinx_enet/xemac.c @ 55

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1/******************************************************************************
2*
3*     Author: Xilinx, Inc.
4*
5*
6*     This program is free software; you can redistribute it and/or modify it
7*     under the terms of the GNU General Public License as published by the
8*     Free Software Foundation; either version 2 of the License, or (at your
9*     option) any later version.
10*
11*
12*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
13*     COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
14*     ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
15*     XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
16*     FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
17*     ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
18*     XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
19*     THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
20*     WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
21*     CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
22*     FITNESS FOR A PARTICULAR PURPOSE.
23*
24*
25*     Xilinx hardware products are not intended for use in life support
26*     appliances, devices, or systems. Use in such applications is
27*     expressly prohibited.
28*
29*
30*     (c) Copyright 2002-2004 Xilinx Inc.
31*     All rights reserved.
32*
33*
34*     You should have received a copy of the GNU General Public License along
35*     with this program; if not, write to the Free Software Foundation, Inc.,
36*     675 Mass Ave, Cambridge, MA 02139, USA.
37*
38******************************************************************************/
39/*****************************************************************************/
40/**
41*
42* @file xemac.c
43*
44* The XEmac driver. Functions in this file are the minimum required functions
45* for this driver. See xemac.h for a detailed description of the driver.
46*
47* <pre>
48* MODIFICATION HISTORY:
49*
50* Ver   Who  Date     Changes
51* ----- ---- -------- -------------------------------------------------------
52* 1.00a rpm  07/31/01 First release
53* 1.00b rpm  02/20/02 Repartitioned files and functions
54* 1.00b rpm  07/23/02 Removed the PHY reset from Initialize()
55* 1.00b rmm  09/23/02 Removed commented code in Initialize(). Recycled as
56*                     XEmac_mPhyReset macro in xemac_l.h.
57* 1.00c rpm  12/05/02 New version includes support for simple DMA
58* 1.00c rpm  12/12/02 Changed location of IsStarted assignment in XEmac_Start
59*                     to be sure the flag is set before the device and
60*                     interrupts are enabled.
61* 1.00c rpm  02/03/03 SelfTest was not clearing polled mode. Take driver out
62*                     of polled mode in XEmac_Reset() to fix this problem.
63* 1.00c rmm  05/13/03 Fixed diab compiler warnings relating to asserts.
64* </pre>
65******************************************************************************/
66
67/***************************** Include Files *********************************/
68
69#include "xbasic_types.h"
70#include "xemac_i.h"
71#include "xio.h"
72#include "xipif_v1_23_b.h"      /* Uses v1.23b of the IPIF */
73
74/************************** Constant Definitions *****************************/
75
76/**************************** Type Definitions *******************************/
77
78/***************** Macros (Inline Functions) Definitions *********************/
79
80/************************** Function Prototypes ******************************/
81
82static XStatus ConfigureDma(XEmac * InstancePtr);
83static XStatus ConfigureFifo(XEmac * InstancePtr);
84static void StubFifoHandler(void *CallBackRef);
85static void StubErrorHandler(void *CallBackRef, XStatus ErrorCode);
86static void StubSgHandler(void *CallBackRef, XBufDescriptor * BdPtr,
87                          u32 NumBds);
88
89/************************** Variable Definitions *****************************/
90
91/*****************************************************************************/
92/**
93*
94* Initialize a specific XEmac instance/driver.  The initialization entails:
95* - Initialize fields of the XEmac structure
96* - Clear the Ethernet statistics for this device
97* - Initialize the IPIF component with its register base address
98* - Configure the FIFO components with their register base addresses.
99* - If the device is configured with DMA, configure the DMA channel components
100*   with their register base addresses. At some later time, memory pools for
101*   the scatter-gather descriptor lists may be passed to the driver.
102* - Reset the Ethernet MAC
103*
104* @param InstancePtr is a pointer to the XEmac instance to be worked on.
105* @param DeviceId is the unique id of the device controlled by this XEmac
106*        instance.  Passing in a device id associates the generic XEmac
107*        instance to a specific device, as chosen by the caller or application
108*        developer.
109*
110* @return
111*
112* - XST_SUCCESS if initialization was successful
113* - XST_DEVICE_IS_STARTED if the device has already been started
114* - XST_DEVICE_NOT_FOUND if device configuration information was not found for
115*   a device with the supplied device ID.
116*
117* @note
118*
119* None.
120*
121******************************************************************************/
122XStatus
123XEmac_Initialize(XEmac * InstancePtr, u16 DeviceId)
124{
125        XStatus Result;
126        XEmac_Config *ConfigPtr;        /* configuration information */
127
128        XASSERT_NONVOID(InstancePtr != NULL);
129
130        /*
131         * If the device is started, disallow the initialize and return a status
132         * indicating it is started.  This allows the user to stop the device
133         * and reinitialize, but prevents a user from inadvertently initializing
134         */
135        if (InstancePtr->IsStarted == XCOMPONENT_IS_STARTED) {
136                return XST_DEVICE_IS_STARTED;
137        }
138
139        /*
140         * Lookup the device configuration in the temporary CROM table. Use this
141         * configuration info down below when initializing this component.
142         */
143        ConfigPtr = XEmac_LookupConfig(DeviceId);
144        if (ConfigPtr == NULL) {
145                return XST_DEVICE_NOT_FOUND;
146        }
147
148        /*
149         * Set some default values
150         */
151        InstancePtr->IsReady = 0;
152        InstancePtr->IsStarted = 0;
153        InstancePtr->IpIfDmaConfig = ConfigPtr->IpIfDmaConfig;
154        InstancePtr->HasMii = ConfigPtr->HasMii;
155        InstancePtr->HasMulticastHash = FALSE;
156
157        /* Always default polled to false, let user configure this mode */
158        InstancePtr->IsPolled = FALSE;
159        InstancePtr->FifoRecvHandler = StubFifoHandler;
160        InstancePtr->FifoSendHandler = StubFifoHandler;
161        InstancePtr->ErrorHandler = StubErrorHandler;
162        InstancePtr->SgRecvHandler = StubSgHandler;
163        InstancePtr->SgSendHandler = StubSgHandler;
164
165        /*
166         * Clear the statistics for this driver
167         */
168        XEmac_mClearStruct((u8 *) & InstancePtr->Stats, sizeof (XEmac_Stats));
169
170        /*
171         * Initialize the device register base addresses
172         */
173        InstancePtr->BaseAddress = ConfigPtr->BaseAddress;
174
175        /*
176         * Configure the send and receive FIFOs in the MAC
177         */
178        Result = ConfigureFifo(InstancePtr);
179        if (Result != XST_SUCCESS) {
180                return Result;
181        }
182
183        /*
184         * If the device is configured for DMA, configure the send and receive DMA
185         * channels in the MAC.
186         */
187        if (XEmac_mIsDma(InstancePtr)) {
188                Result = ConfigureDma(InstancePtr);
189                if (Result != XST_SUCCESS) {
190                        return Result;
191                }
192        }
193
194        /*
195         * Indicate the component is now ready to use. Note that this is done before
196         * we reset the device and the PHY below, which may seem a bit odd. The
197         * choice was made to move it here rather than remove the asserts in various
198         * functions (e.g., Reset() and all functions that it calls).  Applications
199         * that use multiple threads, one to initialize the XEmac driver and one
200         * waiting on the IsReady condition could have a problem with this sequence.
201         */
202        InstancePtr->IsReady = XCOMPONENT_IS_READY;
203
204        /*
205         * Reset the MAC to get it into its initial state. It is expected that
206         * device configuration by the user will take place after this
207         * initialization is done, but before the device is started.
208         */
209        XEmac_Reset(InstancePtr);
210
211        return XST_SUCCESS;
212}
213
214/*****************************************************************************/
215/**
216*
217* Start the Ethernet controller as follows:
218*   - If not in polled mode
219*       - Set the internal interrupt enable registers appropriately
220*       - Enable interrupts within the device itself. Note that connection of
221*         the driver's interrupt handler to the interrupt source (typically
222*         done using the interrupt controller component) is done by the higher
223*         layer software.
224*       - If the device is configured with scatter-gather DMA, start the DMA
225*         channels if the descriptor lists are not empty
226*   - Enable the transmitter
227*   - Enable the receiver
228*
229* The PHY is enabled after driver initialization. We assume the upper layer
230* software has configured it and the EMAC appropriately before this function
231* is called.
232*
233* @param InstancePtr is a pointer to the XEmac instance to be worked on.
234*
235* @return
236*
237* - XST_SUCCESS if the device was started successfully
238* - XST_NO_CALLBACK if a callback function has not yet been registered using
239*   the SetxxxHandler function. This is required if in interrupt mode.
240* - XST_DEVICE_IS_STARTED if the device is already started
241* - XST_DMA_SG_NO_LIST if configured for scatter-gather DMA and a descriptor
242*   list has not yet been created for the send or receive channel.
243*
244* @note
245*
246* The driver tries to match the hardware configuration. So if the hardware
247* is configured with scatter-gather DMA, the driver expects to start the
248* scatter-gather channels and expects that the user has set up the buffer
249* descriptor lists already. If the user expects to use the driver in a mode
250* different than how the hardware is configured, the user should modify the
251* configuration table to reflect the mode to be used. Modifying the config
252* table is a workaround for now until we get some experience with how users
253* are intending to use the hardware in its different configurations. For
254* example, if the hardware is built with scatter-gather DMA but the user is
255* intending to use only simple DMA, the user either needs to modify the config
256* table as a workaround or rebuild the hardware with only simple DMA.
257*
258* This function makes use of internal resources that are shared between the
259* Start, Stop, and SetOptions functions. So if one task might be setting device
260* options while another is trying to start the device, the user is required to
261* provide protection of this shared data (typically using a semaphore).
262*
263******************************************************************************/
264XStatus
265XEmac_Start(XEmac * InstancePtr)
266{
267        u32 ControlReg;
268        XStatus Result;
269
270        XASSERT_NONVOID(InstancePtr != NULL);
271        XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
272
273        /*
274         * If it is already started, return a status indicating so
275         */
276        if (InstancePtr->IsStarted == XCOMPONENT_IS_STARTED) {
277                return XST_DEVICE_IS_STARTED;
278        }
279
280        /*
281         * If not polled, enable interrupts
282         */
283        if (!InstancePtr->IsPolled) {
284                /*
285                 * Verify that the callbacks have been registered, then enable
286                 * interrupts
287                 */
288                if (XEmac_mIsSgDma(InstancePtr)) {
289                        if ((InstancePtr->SgRecvHandler == StubSgHandler) ||
290                            (InstancePtr->SgSendHandler == StubSgHandler)) {
291                                return XST_NO_CALLBACK;
292                        }
293
294                        /* Enable IPIF interrupts */
295                        XIIF_V123B_WRITE_DIER(InstancePtr->BaseAddress,
296                                              XEM_IPIF_DMA_DFT_MASK |
297                                              XIIF_V123B_ERROR_MASK);
298                        XIIF_V123B_WRITE_IIER(InstancePtr->BaseAddress,
299                                              XEM_EIR_DFT_SG_MASK);
300
301                        /* Enable scatter-gather DMA interrupts */
302                        XDmaChannel_SetIntrEnable(&InstancePtr->RecvChannel,
303                                                  XEM_DMA_SG_INTR_MASK);
304                        XDmaChannel_SetIntrEnable(&InstancePtr->SendChannel,
305                                                  XEM_DMA_SG_INTR_MASK);
306                } else {
307                        if ((InstancePtr->FifoRecvHandler == StubFifoHandler) ||
308                            (InstancePtr->FifoSendHandler == StubFifoHandler)) {
309                                return XST_NO_CALLBACK;
310                        }
311
312                        /* Enable IPIF interrupts (used by simple DMA also) */
313                        XIIF_V123B_WRITE_DIER(InstancePtr->BaseAddress,
314                                              XEM_IPIF_FIFO_DFT_MASK |
315                                              XIIF_V123B_ERROR_MASK);
316                        XIIF_V123B_WRITE_IIER(InstancePtr->BaseAddress,
317                                              XEM_EIR_DFT_FIFO_MASK);
318                }
319
320                /* Enable the global IPIF interrupt output */
321                XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
322        }
323
324        /*
325         * Indicate that the device is started before we enable the transmitter
326         * or receiver. This needs to be done before because as soon as the
327         * receiver is enabled we may get an interrupt, and there are functions
328         * in the interrupt handling path that rely on the IsStarted flag.
329         */
330        InstancePtr->IsStarted = XCOMPONENT_IS_STARTED;
331
332        /*
333         * Enable the transmitter, and receiver (do a read/modify/write to preserve
334         * current settings). There is no critical section here since this register
335         * is not modified during interrupt context.
336         */
337        ControlReg = XIo_In32(InstancePtr->BaseAddress + XEM_ECR_OFFSET);
338        ControlReg &= ~(XEM_ECR_XMIT_RESET_MASK | XEM_ECR_RECV_RESET_MASK);
339        ControlReg |= (XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK);
340
341        XIo_Out32(InstancePtr->BaseAddress + XEM_ECR_OFFSET, ControlReg);
342
343        /*
344         * If configured with scatter-gather DMA and not polled, restart the
345         * DMA channels in case there are buffers ready to be sent or received into.
346         * The DMA SgStart function uses data that can be modified during interrupt
347         * context, so a critical section is required here.
348         */
349        if ((XEmac_mIsSgDma(InstancePtr)) && (!InstancePtr->IsPolled)) {
350                XIIF_V123B_GINTR_DISABLE(InstancePtr->BaseAddress);
351
352                /*
353                 * The only error we care about is if the list has not yet been
354                 * created, or on receive, if no buffer descriptors have been
355                 * added yet (the list is empty). Other errors are benign at this point.
356                 */
357                Result = XDmaChannel_SgStart(&InstancePtr->RecvChannel);
358                if ((Result == XST_DMA_SG_NO_LIST)
359                    || (Result == XST_DMA_SG_LIST_EMPTY)) {
360                        XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
361                        return Result;
362                }
363
364                Result = XDmaChannel_SgStart(&InstancePtr->SendChannel);
365                if (Result == XST_DMA_SG_NO_LIST) {
366                        XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
367                        return Result;
368                }
369
370                XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
371        }
372
373        return XST_SUCCESS;
374}
375
376/*****************************************************************************/
377/**
378*
379* Stop the Ethernet MAC as follows:
380*   - If the device is configured with scatter-gather DMA, stop the DMA
381*     channels (wait for acknowledgment of stop)
382*   - Disable the transmitter and receiver
383*   - Disable interrupts if not in polled mode (the higher layer software is
384*     responsible for disabling interrupts at the interrupt controller)
385*
386* The PHY is left enabled after a Stop is called.
387*
388* If the device is configured for scatter-gather DMA, the DMA engine stops at
389* the next buffer descriptor in its list. The remaining descriptors in the list
390* are not removed, so anything in the list will be transmitted or received when
391* the device is restarted. The side effect of doing this is that the last
392* buffer descriptor processed by the DMA engine before stopping may not be the
393* last descriptor in the Ethernet frame. So when the device is restarted, a
394* partial frame (i.e., a bad frame) may be transmitted/received. This is only a
395* concern if a frame can span multiple buffer descriptors, which is dependent
396* on the size of the network buffers.
397*
398* @param InstancePtr is a pointer to the XEmac instance to be worked on.
399*
400* @return
401*
402* - XST_SUCCESS if the device was stopped successfully
403* - XST_DEVICE_IS_STOPPED if the device is already stopped
404*
405* @note
406*
407* This function makes use of internal resources that are shared between the
408* Start, Stop, and SetOptions functions. So if one task might be setting device
409* options while another is trying to start the device, the user is required to
410* provide protection of this shared data (typically using a semaphore).
411*
412******************************************************************************/
413XStatus
414XEmac_Stop(XEmac * InstancePtr)
415{
416        u32 ControlReg;
417
418        XASSERT_NONVOID(InstancePtr != NULL);
419        XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
420
421        /*
422         * If the device is already stopped, do nothing but return a status
423         * indicating so
424         */
425        if (InstancePtr->IsStarted != XCOMPONENT_IS_STARTED) {
426                return XST_DEVICE_IS_STOPPED;
427        }
428
429        /*
430         * If configured for scatter-gather DMA, stop the DMA channels. Ignore
431         * the XST_DMA_SG_IS_STOPPED return code. There is a critical section
432         * here between SgStart and SgStop, and SgStart can be called in interrupt
433         * context, so disable interrupts while calling SgStop.
434         */
435        if (XEmac_mIsSgDma(InstancePtr)) {
436                XBufDescriptor *BdTemp; /* temporary descriptor pointer */
437
438                XIIF_V123B_GINTR_DISABLE(InstancePtr->BaseAddress);
439
440                (void) XDmaChannel_SgStop(&InstancePtr->SendChannel, &BdTemp);
441                (void) XDmaChannel_SgStop(&InstancePtr->RecvChannel, &BdTemp);
442
443                XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);
444        }
445
446        /*
447         * Disable the transmitter and receiver. There is no critical section
448         * here since this register is not modified during interrupt context.
449         */
450        ControlReg = XIo_In32(InstancePtr->BaseAddress + XEM_ECR_OFFSET);
451        ControlReg &= ~(XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK);
452        XIo_Out32(InstancePtr->BaseAddress + XEM_ECR_OFFSET, ControlReg);
453
454        /*
455         * If not in polled mode, disable interrupts for IPIF (includes MAC and
456         * DMAs)
457         */
458        if (!InstancePtr->IsPolled) {
459                XIIF_V123B_GINTR_DISABLE(InstancePtr->BaseAddress);
460        }
461
462        InstancePtr->IsStarted = 0;
463
464        return XST_SUCCESS;
465}
466
467/*****************************************************************************/
468/**
469*
470* Reset the Ethernet MAC. This is a graceful reset in that the device is stopped
471* first. Resets the DMA channels, the FIFOs, the transmitter, and the receiver.
472* The PHY is not reset. Any frames in the scatter-gather descriptor lists will
473* remain in the lists. The side effect of doing this is that after a reset and
474* following a restart of the device, frames that were in the list before the
475* reset may be transmitted or received. Reset must only be called after the
476* driver has been initialized.
477*
478* The driver is also taken out of polled mode if polled mode was set. The user
479* is responsbile for re-configuring the driver into polled mode after the
480* reset if desired.
481*
482* The configuration after this reset is as follows:
483*   - Half duplex
484*   - Disabled transmitter and receiver
485*   - Enabled PHY (the PHY is not reset)
486*   - MAC transmitter does pad insertion, FCS insertion, and source address
487*     overwrite.
488*   - MAC receiver does not strip padding or FCS
489*   - Interframe Gap as recommended by IEEE Std. 802.3 (96 bit times)
490*   - Unicast addressing enabled
491*   - Broadcast addressing enabled
492*   - Multicast addressing disabled (addresses are preserved)
493*   - Promiscuous addressing disabled
494*   - Default packet threshold and packet wait bound register values for
495*     scatter-gather DMA operation
496*   - MAC address of all zeros
497*   - Non-polled mode
498*
499* The upper layer software is responsible for re-configuring (if necessary)
500* and restarting the MAC after the reset. Note that the PHY is not reset. PHY
501* control is left to the upper layer software. Note also that driver statistics
502* are not cleared on reset. It is up to the upper layer software to clear the
503* statistics if needed.
504*
505* When a reset is required due to an internal error, the driver notifies the
506* upper layer software of this need through the ErrorHandler callback and
507* specific status codes.  The upper layer software is responsible for calling
508* this Reset function and then re-configuring the device.
509*
510* @param InstancePtr is a pointer to the XEmac instance to be worked on.
511*
512* @return
513*
514* None.
515*
516* @note
517*
518* None.
519*
520* @internal
521*
522* The reset is accomplished by setting the IPIF reset register.  This takes
523* care of resetting all hardware blocks, including the MAC.
524*
525******************************************************************************/
526void
527XEmac_Reset(XEmac * InstancePtr)
528{
529        XASSERT_VOID(InstancePtr != NULL);
530        XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
531
532        /*
533         * Stop the device first
534         */
535        (void) XEmac_Stop(InstancePtr);
536
537        /*
538         * Take the driver out of polled mode
539         */
540        InstancePtr->IsPolled = FALSE;
541
542        /*
543         * Reset the entire IPIF at once.  If we choose someday to reset each
544         * hardware block separately, the reset should occur in the direction of
545         * data flow. For example, for the send direction the reset order is DMA
546         * first, then FIFO, then the MAC transmitter.
547         */
548        XIIF_V123B_RESET(InstancePtr->BaseAddress);
549
550        if (XEmac_mIsSgDma(InstancePtr)) {
551                /*
552                 * After reset, configure the scatter-gather DMA packet threshold and
553                 * packet wait bound registers to default values. Ignore the return
554                 * values of these functions since they only return error if the device
555                 * is not stopped.
556                 */
557                (void) XEmac_SetPktThreshold(InstancePtr, XEM_SEND,
558                                             XEM_SGDMA_DFT_THRESHOLD);
559                (void) XEmac_SetPktThreshold(InstancePtr, XEM_RECV,
560                                             XEM_SGDMA_DFT_THRESHOLD);
561                (void) XEmac_SetPktWaitBound(InstancePtr, XEM_SEND,
562                                             XEM_SGDMA_DFT_WAITBOUND);
563                (void) XEmac_SetPktWaitBound(InstancePtr, XEM_RECV,
564                                             XEM_SGDMA_DFT_WAITBOUND);
565        }
566}
567
568/*****************************************************************************/
569/**
570*
571* Set the MAC address for this driver/device.  The address is a 48-bit value.
572* The device must be stopped before calling this function.
573*
574* @param InstancePtr is a pointer to the XEmac instance to be worked on.
575* @param AddressPtr is a pointer to a 6-byte MAC address.
576*
577* @return
578*
579* - XST_SUCCESS if the MAC address was set successfully
580* - XST_DEVICE_IS_STARTED if the device has not yet been stopped
581*
582* @note
583*
584* None.
585*
586******************************************************************************/
587XStatus
588XEmac_SetMacAddress(XEmac * InstancePtr, u8 * AddressPtr)
589{
590        u32 MacAddr = 0;
591
592        XASSERT_NONVOID(InstancePtr != NULL);
593        XASSERT_NONVOID(AddressPtr != NULL);
594        XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
595
596        /*
597         * The device must be stopped before setting the MAC address
598         */
599        if (InstancePtr->IsStarted == XCOMPONENT_IS_STARTED) {
600                return XST_DEVICE_IS_STARTED;
601        }
602
603        /*
604         * Set the device station address high and low registers
605         */
606        MacAddr = (AddressPtr[0] << 8) | AddressPtr[1];
607        XIo_Out32(InstancePtr->BaseAddress + XEM_SAH_OFFSET, MacAddr);
608
609        MacAddr = (AddressPtr[2] << 24) | (AddressPtr[3] << 16) |
610            (AddressPtr[4] << 8) | AddressPtr[5];
611
612        XIo_Out32(InstancePtr->BaseAddress + XEM_SAL_OFFSET, MacAddr);
613
614        return XST_SUCCESS;
615}
616
617/*****************************************************************************/
618/**
619*
620* Get the MAC address for this driver/device.
621*
622* @param InstancePtr is a pointer to the XEmac instance to be worked on.
623* @param BufferPtr is an output parameter, and is a pointer to a buffer into
624*        which the current MAC address will be copied. The buffer must be at
625*        least 6 bytes.
626*
627* @return
628*
629* None.
630*
631* @note
632*
633* None.
634*
635******************************************************************************/
636void
637XEmac_GetMacAddress(XEmac * InstancePtr, u8 * BufferPtr)
638{
639        u32 MacAddrHi;
640        u32 MacAddrLo;
641
642        XASSERT_VOID(InstancePtr != NULL);
643        XASSERT_VOID(BufferPtr != NULL);
644        XASSERT_VOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
645
646        MacAddrHi = XIo_In32(InstancePtr->BaseAddress + XEM_SAH_OFFSET);
647        MacAddrLo = XIo_In32(InstancePtr->BaseAddress + XEM_SAL_OFFSET);
648
649        BufferPtr[0] = (u8) (MacAddrHi >> 8);
650        BufferPtr[1] = (u8) MacAddrHi;
651        BufferPtr[2] = (u8) (MacAddrLo >> 24);
652        BufferPtr[3] = (u8) (MacAddrLo >> 16);
653        BufferPtr[4] = (u8) (MacAddrLo >> 8);
654        BufferPtr[5] = (u8) MacAddrLo;
655}
656
657/******************************************************************************/
658/**
659*
660* Configure DMA capabilities.
661*
662* @param InstancePtr is a pointer to the XEmac instance to be worked on.
663*
664* @return
665*
666* - XST_SUCCESS  if successful initialization of DMA
667*
668* @note
669*
670* None.
671*
672******************************************************************************/
673static XStatus
674ConfigureDma(XEmac * InstancePtr)
675{
676        XStatus Result;
677
678        /*
679         * Initialize the DMA channels with their base addresses. We assume
680         * scatter-gather DMA is the only possible configuration. Descriptor space
681         * will need to be set later by the upper layer.
682         */
683        Result = XDmaChannel_Initialize(&InstancePtr->RecvChannel,
684                                        InstancePtr->BaseAddress +
685                                        XEM_DMA_RECV_OFFSET);
686        if (Result != XST_SUCCESS) {
687                return Result;
688        }
689
690        Result = XDmaChannel_Initialize(&InstancePtr->SendChannel,
691                                        InstancePtr->BaseAddress +
692                                        XEM_DMA_SEND_OFFSET);
693
694        return Result;
695}
696
697/******************************************************************************/
698/**
699*
700* Configure the send and receive FIFO components with their base addresses
701* and interrupt masks.  Currently the base addresses are defined constants.
702*
703* @param InstancePtr is a pointer to the XEmac instance to be worked on.
704*
705* @return
706*
707* XST_SUCCESS if successful initialization of the packet FIFOs
708*
709* @note
710*
711* None.
712*
713******************************************************************************/
714static XStatus
715ConfigureFifo(XEmac * InstancePtr)
716{
717        XStatus Result;
718
719        /*
720         * Return status from the packet FIFOs initialization is ignored since
721         * they always return success.
722         */
723        Result = XPacketFifoV100b_Initialize(&InstancePtr->RecvFifo,
724                                             InstancePtr->BaseAddress +
725                                             XEM_PFIFO_RXREG_OFFSET,
726                                             InstancePtr->BaseAddress +
727                                             XEM_PFIFO_RXDATA_OFFSET);
728        if (Result != XST_SUCCESS) {
729                return Result;
730        }
731
732        Result = XPacketFifoV100b_Initialize(&InstancePtr->SendFifo,
733                                             InstancePtr->BaseAddress +
734                                             XEM_PFIFO_TXREG_OFFSET,
735                                             InstancePtr->BaseAddress +
736                                             XEM_PFIFO_TXDATA_OFFSET);
737        return Result;
738}
739
740/******************************************************************************/
741/**
742*
743* This is a stub for the scatter-gather send and recv callbacks. The stub
744* is here in case the upper layers forget to set the handlers.
745*
746* @param CallBackRef is a pointer to the upper layer callback reference
747* @param BdPtr is a pointer to the first buffer descriptor in a list
748* @param NumBds is the number of descriptors in the list.
749*
750* @return
751*
752* None.
753*
754* @note
755*
756* None.
757*
758******************************************************************************/
759static void
760StubSgHandler(void *CallBackRef, XBufDescriptor * BdPtr, u32 NumBds)
761{
762        XASSERT_VOID_ALWAYS();
763}
764
765/******************************************************************************/
766/**
767*
768* This is a stub for the non-DMA send and recv callbacks.  The stub is here in
769* case the upper layers forget to set the handlers.
770*
771* @param CallBackRef is a pointer to the upper layer callback reference
772*
773* @return
774*
775* None.
776*
777* @note
778*
779* None.
780*
781******************************************************************************/
782static void
783StubFifoHandler(void *CallBackRef)
784{
785        XASSERT_VOID_ALWAYS();
786}
787
788/******************************************************************************/
789/**
790*
791* This is a stub for the asynchronous error callback.  The stub is here in
792* case the upper layers forget to set the handler.
793*
794* @param CallBackRef is a pointer to the upper layer callback reference
795* @param ErrorCode is the Xilinx error code, indicating the cause of the error
796*
797* @return
798*
799* None.
800*
801* @note
802*
803* None.
804*
805******************************************************************************/
806static void
807StubErrorHandler(void *CallBackRef, XStatus ErrorCode)
808{
809        XASSERT_VOID_ALWAYS();
810}
811
812/*****************************************************************************/
813/**
814*
815* Lookup the device configuration based on the unique device ID.  The table
816* EmacConfigTable contains the configuration info for each device in the system.
817*
818* @param DeviceId is the unique device ID of the device being looked up.
819*
820* @return
821*
822* A pointer to the configuration table entry corresponding to the given
823* device ID, or NULL if no match is found.
824*
825* @note
826*
827* None.
828*
829******************************************************************************/
830XEmac_Config *
831XEmac_LookupConfig(u16 DeviceId)
832{
833        XEmac_Config *CfgPtr = NULL;
834        int i;
835
836        for (i = 0; i < XPAR_XEMAC_NUM_INSTANCES; i++) {
837                if (XEmac_ConfigTable[i].DeviceId == DeviceId) {
838                        CfgPtr = &XEmac_ConfigTable[i];
839                        break;
840                }
841        }
842
843        return CfgPtr;
844}
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