1 | /* |
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2 | * (C) Copyright 2001 |
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3 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com |
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4 | * |
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5 | * See file CREDITS for list of people who contributed to this |
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6 | * project. |
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7 | * |
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8 | * This program is free software; you can redistribute it and/or |
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9 | * modify it under the terms of the GNU General Public License as |
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10 | * published by the Free Software Foundation; either version 2 of |
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11 | * the License, or (at your option) any later version. |
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12 | * |
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13 | * This program is distributed in the hope that it will be useful, |
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14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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16 | * GNU General Public License for more details. |
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17 | * |
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18 | * You should have received a copy of the GNU General Public License |
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19 | * along with this program; if not, write to the Free Software |
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20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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21 | * MA 02111-1307 USA |
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22 | */ |
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23 | |
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24 | /* |
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25 | * MII Utilities |
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26 | */ |
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27 | |
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28 | #include <common.h> |
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29 | #include <command.h> |
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30 | #include <miiphy.h> |
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31 | |
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32 | typedef struct _MII_reg_desc_t { |
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33 | ushort regno; |
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34 | char * name; |
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35 | } MII_reg_desc_t; |
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36 | |
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37 | MII_reg_desc_t reg_0_5_desc_tbl[] = { |
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38 | { 0, "PHY control register" }, |
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39 | { 1, "PHY status register" }, |
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40 | { 2, "PHY ID 1 register" }, |
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41 | { 3, "PHY ID 2 register" }, |
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42 | { 4, "Autonegotiation advertisement register" }, |
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43 | { 5, "Autonegotiation partner abilities register" }, |
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44 | }; |
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45 | |
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46 | typedef struct _MII_field_desc_t { |
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47 | ushort hi; |
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48 | ushort lo; |
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49 | ushort mask; |
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50 | char * name; |
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51 | } MII_field_desc_t; |
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52 | |
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53 | MII_field_desc_t reg_0_desc_tbl[] = { |
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54 | { 15, 15, 0x01, "reset" }, |
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55 | { 14, 14, 0x01, "loopback" }, |
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56 | { 13, 6, 0x81, "speed selection" }, /* special */ |
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57 | { 12, 12, 0x01, "A/N enable" }, |
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58 | { 11, 11, 0x01, "power-down" }, |
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59 | { 10, 10, 0x01, "isolate" }, |
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60 | { 9, 9, 0x01, "restart A/N" }, |
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61 | { 8, 8, 0x01, "duplex" }, /* special */ |
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62 | { 7, 7, 0x01, "collision test enable" }, |
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63 | { 5, 0, 0x3f, "(reserved)" } |
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64 | }; |
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65 | |
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66 | MII_field_desc_t reg_1_desc_tbl[] = { |
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67 | { 15, 15, 0x01, "100BASE-T4 able" }, |
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68 | { 14, 14, 0x01, "100BASE-X full duplex able" }, |
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69 | { 13, 13, 0x01, "100BASE-X half duplex able" }, |
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70 | { 12, 12, 0x01, "10 Mbps full duplex able" }, |
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71 | { 11, 11, 0x01, "10 Mbps half duplex able" }, |
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72 | { 10, 10, 0x01, "100BASE-T2 full duplex able" }, |
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73 | { 9, 9, 0x01, "100BASE-T2 half duplex able" }, |
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74 | { 8, 8, 0x01, "extended status" }, |
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75 | { 7, 7, 0x01, "(reserved)" }, |
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76 | { 6, 6, 0x01, "MF preamble suppression" }, |
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77 | { 5, 5, 0x01, "A/N complete" }, |
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78 | { 4, 4, 0x01, "remote fault" }, |
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79 | { 3, 3, 0x01, "A/N able" }, |
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80 | { 2, 2, 0x01, "link status" }, |
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81 | { 1, 1, 0x01, "jabber detect" }, |
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82 | { 0, 0, 0x01, "extended capabilities" }, |
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83 | }; |
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84 | |
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85 | MII_field_desc_t reg_2_desc_tbl[] = { |
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86 | { 15, 0, 0xffff, "OUI portion" }, |
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87 | }; |
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88 | |
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89 | MII_field_desc_t reg_3_desc_tbl[] = { |
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90 | { 15, 10, 0x3f, "OUI portion" }, |
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91 | { 9, 4, 0x3f, "manufacturer part number" }, |
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92 | { 3, 0, 0x0f, "manufacturer rev. number" }, |
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93 | }; |
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94 | |
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95 | MII_field_desc_t reg_4_desc_tbl[] = { |
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96 | { 15, 15, 0x01, "next page able" }, |
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97 | { 14, 14, 0x01, "reserved" }, |
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98 | { 13, 13, 0x01, "remote fault" }, |
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99 | { 12, 12, 0x01, "reserved" }, |
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100 | { 11, 11, 0x01, "asymmetric pause" }, |
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101 | { 10, 10, 0x01, "pause enable" }, |
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102 | { 9, 9, 0x01, "100BASE-T4 able" }, |
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103 | { 8, 8, 0x01, "100BASE-TX full duplex able" }, |
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104 | { 7, 7, 0x01, "100BASE-TX able" }, |
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105 | { 6, 6, 0x01, "10BASE-T full duplex able" }, |
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106 | { 5, 5, 0x01, "10BASE-T able" }, |
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107 | { 4, 0, 0x1f, "xxx to do" }, |
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108 | }; |
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109 | |
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110 | MII_field_desc_t reg_5_desc_tbl[] = { |
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111 | { 15, 15, 0x01, "next page able" }, |
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112 | { 14, 14, 0x01, "acknowledge" }, |
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113 | { 13, 13, 0x01, "remote fault" }, |
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114 | { 12, 12, 0x01, "(reserved)" }, |
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115 | { 11, 11, 0x01, "asymmetric pause able" }, |
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116 | { 10, 10, 0x01, "pause able" }, |
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117 | { 9, 9, 0x01, "100BASE-T4 able" }, |
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118 | { 8, 8, 0x01, "100BASE-X full duplex able" }, |
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119 | { 7, 7, 0x01, "100BASE-TX able" }, |
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120 | { 6, 6, 0x01, "10BASE-T full duplex able" }, |
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121 | { 5, 5, 0x01, "10BASE-T able" }, |
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122 | { 4, 0, 0x1f, "xxx to do" }, |
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123 | }; |
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124 | |
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125 | #define DESC0LEN (sizeof(reg_0_desc_tbl)/sizeof(reg_0_desc_tbl[0])) |
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126 | #define DESC1LEN (sizeof(reg_1_desc_tbl)/sizeof(reg_1_desc_tbl[0])) |
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127 | #define DESC2LEN (sizeof(reg_2_desc_tbl)/sizeof(reg_2_desc_tbl[0])) |
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128 | #define DESC3LEN (sizeof(reg_3_desc_tbl)/sizeof(reg_3_desc_tbl[0])) |
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129 | #define DESC4LEN (sizeof(reg_4_desc_tbl)/sizeof(reg_4_desc_tbl[0])) |
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130 | #define DESC5LEN (sizeof(reg_5_desc_tbl)/sizeof(reg_5_desc_tbl[0])) |
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131 | |
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132 | typedef struct _MII_field_desc_and_len_t { |
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133 | MII_field_desc_t * pdesc; |
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134 | ushort len; |
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135 | } MII_field_desc_and_len_t; |
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136 | |
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137 | MII_field_desc_and_len_t desc_and_len_tbl[] = { |
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138 | { reg_0_desc_tbl, DESC0LEN }, |
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139 | { reg_1_desc_tbl, DESC1LEN }, |
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140 | { reg_2_desc_tbl, DESC2LEN }, |
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141 | { reg_3_desc_tbl, DESC3LEN }, |
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142 | { reg_4_desc_tbl, DESC4LEN }, |
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143 | { reg_5_desc_tbl, DESC5LEN }, |
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144 | }; |
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145 | |
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146 | static void dump_reg( |
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147 | ushort regval, |
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148 | MII_reg_desc_t * prd, |
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149 | MII_field_desc_and_len_t * pdl); |
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150 | |
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151 | static int special_field( |
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152 | ushort regno, |
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153 | MII_field_desc_t * pdesc, |
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154 | ushort regval); |
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155 | |
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156 | void MII_dump_0_to_5( |
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157 | ushort regvals[6], |
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158 | uchar reglo, |
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159 | uchar reghi) |
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160 | { |
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161 | ulong i; |
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162 | |
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163 | for (i = 0; i < 6; i++) { |
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164 | if ((reglo <= i) && (i <= reghi)) |
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165 | dump_reg(regvals[i], ®_0_5_desc_tbl[i], |
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166 | &desc_and_len_tbl[i]); |
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167 | } |
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168 | } |
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169 | |
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170 | static void dump_reg( |
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171 | ushort regval, |
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172 | MII_reg_desc_t * prd, |
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173 | MII_field_desc_and_len_t * pdl) |
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174 | { |
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175 | ulong i; |
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176 | ushort mask_in_place; |
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177 | MII_field_desc_t * pdesc; |
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178 | |
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179 | printf("%u. (%04hx) -- %s --\n", |
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180 | prd->regno, regval, prd->name); |
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181 | |
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182 | for (i = 0; i < pdl->len; i++) { |
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183 | pdesc = &pdl->pdesc[i]; |
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184 | |
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185 | mask_in_place = pdesc->mask << pdesc->lo; |
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186 | |
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187 | printf(" (%04hx:%04hx) %u.", |
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188 | mask_in_place, |
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189 | regval & mask_in_place, |
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190 | prd->regno); |
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191 | |
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192 | if (special_field(prd->regno, pdesc, regval)) { |
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193 | } |
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194 | else { |
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195 | if (pdesc->hi == pdesc->lo) |
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196 | printf("%2u ", pdesc->lo); |
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197 | else |
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198 | printf("%2u-%2u", pdesc->hi, pdesc->lo); |
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199 | printf(" = %5u %s", |
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200 | (regval & mask_in_place) >> pdesc->lo, |
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201 | pdesc->name); |
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202 | } |
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203 | printf("\n"); |
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204 | |
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205 | } |
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206 | printf("\n"); |
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207 | } |
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208 | |
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209 | /* Special fields: |
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210 | ** 0.6,13 |
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211 | ** 0.8 |
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212 | ** 2.15-0 |
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213 | ** 3.15-0 |
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214 | ** 4.4-0 |
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215 | ** 5.4-0 |
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216 | */ |
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217 | |
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218 | static int special_field( |
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219 | ushort regno, |
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220 | MII_field_desc_t * pdesc, |
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221 | ushort regval) |
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222 | { |
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223 | if ((regno == 0) && (pdesc->lo == 6)) { |
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224 | ushort speed_bits = regval & PHY_BMCR_SPEED_MASK; |
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225 | printf("%2u,%2u = b%u%u speed selection = %s Mbps", |
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226 | 6, 13, |
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227 | (regval >> 6) & 1, |
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228 | (regval >> 13) & 1, |
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229 | speed_bits == PHY_BMCR_1000_MBPS ? "1000" : |
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230 | speed_bits == PHY_BMCR_100_MBPS ? "100" : |
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231 | speed_bits == PHY_BMCR_10_MBPS ? "10" : |
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232 | "???"); |
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233 | return 1; |
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234 | } |
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235 | |
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236 | else if ((regno == 0) && (pdesc->lo == 8)) { |
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237 | printf("%2u = %5u duplex = %s", |
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238 | pdesc->lo, |
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239 | (regval >> pdesc->lo) & 1, |
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240 | ((regval >> pdesc->lo) & 1) ? "full" : "half"); |
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241 | return 1; |
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242 | } |
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243 | |
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244 | else if ((regno == 4) && (pdesc->lo == 0)) { |
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245 | ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask; |
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246 | printf("%2u-%2u = %5u selector = %s", |
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247 | pdesc->hi, pdesc->lo, sel_bits, |
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248 | sel_bits == PHY_ANLPAR_PSB_802_3 ? |
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249 | "IEEE 802.3" : |
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250 | sel_bits == PHY_ANLPAR_PSB_802_9 ? |
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251 | "IEEE 802.9 ISLAN-16T" : |
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252 | "???"); |
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253 | return 1; |
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254 | } |
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255 | |
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256 | else if ((regno == 5) && (pdesc->lo == 0)) { |
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257 | ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask; |
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258 | printf("%2u-%2u = %u selector = %s", |
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259 | pdesc->hi, pdesc->lo, sel_bits, |
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260 | sel_bits == PHY_ANLPAR_PSB_802_3 ? |
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261 | "IEEE 802.3" : |
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262 | sel_bits == PHY_ANLPAR_PSB_802_9 ? |
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263 | "IEEE 802.9 ISLAN-16T" : |
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264 | "???"); |
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265 | return 1; |
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266 | } |
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267 | |
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268 | return 0; |
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269 | } |
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270 | |
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271 | char last_op[2]; |
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272 | uint last_data; |
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273 | uint last_addr_lo; |
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274 | uint last_addr_hi; |
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275 | uint last_reg_lo; |
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276 | uint last_reg_hi; |
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277 | |
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278 | static void extract_range( |
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279 | char * input, |
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280 | unsigned char * plo, |
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281 | unsigned char * phi) |
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282 | { |
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283 | char * end; |
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284 | *plo = simple_strtoul(input, &end, 16); |
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285 | if (*end == '-') { |
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286 | end++; |
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287 | *phi = simple_strtoul(end, NULL, 16); |
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288 | } |
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289 | else { |
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290 | *phi = *plo; |
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291 | } |
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292 | } |
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293 | |
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294 | /* ---------------------------------------------------------------- */ |
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295 | int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) |
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296 | { |
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297 | char op[2]; |
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298 | unsigned char addrlo, addrhi, reglo, reghi; |
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299 | unsigned char addr, reg; |
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300 | unsigned short data; |
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301 | int rcode = 0; |
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302 | char *devname; |
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303 | |
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304 | if (argc < 2) { |
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305 | printf("Usage:\n%s\n", cmdtp->usage); |
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306 | return 1; |
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307 | } |
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308 | |
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309 | #if defined(CONFIG_MII_INIT) |
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310 | mii_init (); |
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311 | #endif |
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312 | |
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313 | /* |
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314 | * We use the last specified parameters, unless new ones are |
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315 | * entered. |
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316 | */ |
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317 | op[0] = last_op[0]; |
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318 | op[1] = last_op[1]; |
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319 | addrlo = last_addr_lo; |
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320 | addrhi = last_addr_hi; |
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321 | reglo = last_reg_lo; |
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322 | reghi = last_reg_hi; |
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323 | data = last_data; |
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324 | |
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325 | if ((flag & CMD_FLAG_REPEAT) == 0) { |
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326 | op[0] = argv[1][0]; |
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327 | if (strlen(argv[1]) > 1) |
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328 | op[1] = argv[1][1]; |
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329 | else |
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330 | op[1] = '\0'; |
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331 | |
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332 | if (argc >= 3) |
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333 | extract_range(argv[2], &addrlo, &addrhi); |
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334 | if (argc >= 4) |
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335 | extract_range(argv[3], ®lo, ®hi); |
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336 | if (argc >= 5) |
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337 | data = simple_strtoul (argv[4], NULL, 16); |
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338 | } |
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339 | |
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340 | /* use current device */ |
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341 | devname = miiphy_get_current_dev(); |
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342 | |
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343 | /* |
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344 | * check info/read/write. |
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345 | */ |
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346 | if (op[0] == 'i') { |
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347 | unsigned char j, start, end; |
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348 | unsigned int oui; |
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349 | unsigned char model; |
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350 | unsigned char rev; |
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351 | |
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352 | /* |
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353 | * Look for any and all PHYs. Valid addresses are 0..31. |
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354 | */ |
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355 | if (argc >= 3) { |
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356 | start = addrlo; end = addrhi; |
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357 | } else { |
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358 | start = 0; end = 31; |
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359 | } |
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360 | |
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361 | for (j = start; j <= end; j++) { |
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362 | if (miiphy_info (devname, j, &oui, &model, &rev) == 0) { |
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363 | printf("PHY 0x%02X: " |
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364 | "OUI = 0x%04X, " |
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365 | "Model = 0x%02X, " |
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366 | "Rev = 0x%02X, " |
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367 | "%3dbase%s, %s\n", |
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368 | j, oui, model, rev, |
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369 | miiphy_speed (devname, j), |
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370 | miiphy_is_1000base_x (devname, j) |
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371 | ? "X" : "T", |
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372 | (miiphy_duplex (devname, j) == FULL) |
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373 | ? "FDX" : "HDX"); |
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374 | } |
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375 | } |
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376 | } else if (op[0] == 'r') { |
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377 | for (addr = addrlo; addr <= addrhi; addr++) { |
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378 | for (reg = reglo; reg <= reghi; reg++) { |
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379 | data = 0xffff; |
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380 | if (miiphy_read (devname, addr, reg, &data) != 0) { |
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381 | printf( |
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382 | "Error reading from the PHY addr=%02x reg=%02x\n", |
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383 | addr, reg); |
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384 | rcode = 1; |
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385 | } else { |
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386 | if ((addrlo != addrhi) || (reglo != reghi)) |
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387 | printf("addr=%02x reg=%02x data=", |
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388 | (uint)addr, (uint)reg); |
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389 | printf("%04X\n", data & 0x0000FFFF); |
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390 | } |
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391 | } |
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392 | if ((addrlo != addrhi) && (reglo != reghi)) |
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393 | printf("\n"); |
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394 | } |
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395 | } else if (op[0] == 'w') { |
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396 | for (addr = addrlo; addr <= addrhi; addr++) { |
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397 | for (reg = reglo; reg <= reghi; reg++) { |
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398 | if (miiphy_write (devname, addr, reg, data) != 0) { |
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399 | printf("Error writing to the PHY addr=%02x reg=%02x\n", |
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400 | addr, reg); |
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401 | rcode = 1; |
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402 | } |
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403 | } |
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404 | } |
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405 | } else if (strncmp(op, "du", 2) == 0) { |
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406 | ushort regs[6]; |
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407 | int ok = 1; |
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408 | if ((reglo > 5) || (reghi > 5)) { |
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409 | printf( |
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410 | "The MII dump command only formats the " |
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411 | "standard MII registers, 0-5.\n"); |
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412 | return 1; |
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413 | } |
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414 | for (addr = addrlo; addr <= addrhi; addr++) { |
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415 | for (reg = reglo; reg < reghi + 1; reg++) { |
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416 | if (miiphy_read(devname, addr, reg, ®s[reg]) != 0) { |
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417 | ok = 0; |
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418 | printf( |
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419 | "Error reading from the PHY addr=%02x reg=%02x\n", |
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420 | addr, reg); |
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421 | rcode = 1; |
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422 | } |
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423 | } |
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424 | if (ok) |
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425 | MII_dump_0_to_5(regs, reglo, reghi); |
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426 | printf("\n"); |
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427 | } |
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428 | } else if (strncmp(op, "de", 2) == 0) { |
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429 | if (argc == 2) |
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430 | miiphy_listdev (); |
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431 | else |
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432 | miiphy_set_current_dev (argv[2]); |
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433 | } else { |
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434 | printf("Usage:\n%s\n", cmdtp->usage); |
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435 | return 1; |
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436 | } |
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437 | |
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438 | /* |
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439 | * Save the parameters for repeats. |
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440 | */ |
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441 | last_op[0] = op[0]; |
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442 | last_op[1] = op[1]; |
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443 | last_addr_lo = addrlo; |
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444 | last_addr_hi = addrhi; |
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445 | last_reg_lo = reglo; |
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446 | last_reg_hi = reghi; |
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447 | last_data = data; |
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448 | |
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449 | return rcode; |
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450 | } |
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451 | |
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452 | /***************************************************/ |
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453 | |
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454 | U_BOOT_CMD( |
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455 | mii, 5, 1, do_mii, |
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456 | "mii - MII utility commands\n", |
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457 | "device - list available devices\n" |
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458 | "mii device <devname> - set current device\n" |
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459 | "mii info <addr> - display MII PHY info\n" |
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460 | "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n" |
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461 | "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n" |
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462 | "mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n" |
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463 | "Addr and/or reg may be ranges, e.g. 2-7.\n" |
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464 | ); |
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