1 | /* |
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2 | * (C) Copyright 2001 |
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3 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. |
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4 | * |
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5 | * See file CREDITS for list of people who contributed to this |
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6 | * project. |
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7 | * |
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8 | * This program is free software; you can redistribute it and/or |
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9 | * modify it under the terms of the GNU General Public License as |
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10 | * published by the Free Software Foundation; either version 2 of |
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11 | * the License, or (at your option) any later version. |
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12 | * |
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13 | * This program is distributed in the hope that it will be useful, |
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14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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16 | * GNU General Public License for more details. |
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17 | * |
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18 | * You should have received a copy of the GNU General Public License |
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19 | * along with this program; if not, write to the Free Software |
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20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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21 | * MA 02111-1307 USA |
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22 | */ |
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23 | |
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24 | /* |
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25 | * This provides a bit-banged interface to the ethernet MII management |
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26 | * channel. |
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27 | */ |
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28 | |
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29 | #include <common.h> |
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30 | #include <miiphy.h> |
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31 | |
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32 | #include <asm/types.h> |
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33 | #include <linux/list.h> |
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34 | #include <malloc.h> |
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35 | #include <net.h> |
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36 | |
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37 | /* local debug macro */ |
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38 | #undef MII_DEBUG |
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39 | |
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40 | #undef debug |
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41 | #ifdef MII_DEBUG |
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42 | #define debug(fmt,args...) printf (fmt ,##args) |
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43 | #else |
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44 | #define debug(fmt,args...) |
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45 | #endif /* MII_DEBUG */ |
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46 | |
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47 | struct mii_dev { |
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48 | struct list_head link; |
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49 | char *name; |
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50 | int (*read) (char *devname, unsigned char addr, |
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51 | unsigned char reg, unsigned short *value); |
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52 | int (*write) (char *devname, unsigned char addr, |
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53 | unsigned char reg, unsigned short value); |
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54 | }; |
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55 | |
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56 | static struct list_head mii_devs; |
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57 | static struct mii_dev *current_mii; |
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58 | |
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59 | /***************************************************************************** |
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60 | * |
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61 | * Initialize global data. Need to be called before any other miiphy routine. |
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62 | */ |
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63 | void miiphy_init () |
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64 | { |
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65 | INIT_LIST_HEAD (&mii_devs); |
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66 | current_mii = NULL; |
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67 | } |
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68 | |
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69 | /***************************************************************************** |
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70 | * |
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71 | * Register read and write MII access routines for the device <name>. |
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72 | */ |
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73 | void miiphy_register (char *name, |
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74 | int (*read) (char *devname, unsigned char addr, |
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75 | unsigned char reg, unsigned short *value), |
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76 | int (*write) (char *devname, unsigned char addr, |
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77 | unsigned char reg, unsigned short value)) |
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78 | { |
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79 | struct list_head *entry; |
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80 | struct mii_dev *new_dev; |
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81 | struct mii_dev *miidev; |
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82 | unsigned int name_len; |
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83 | |
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84 | /* check if we have unique name */ |
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85 | list_for_each (entry, &mii_devs) { |
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86 | miidev = list_entry (entry, struct mii_dev, link); |
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87 | if (strcmp (miidev->name, name) == 0) { |
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88 | printf ("miiphy_register: non unique device name " |
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89 | "'%s'\n", name); |
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90 | return; |
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91 | } |
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92 | } |
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93 | |
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94 | /* allocate memory */ |
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95 | name_len = strlen (name); |
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96 | new_dev = |
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97 | (struct mii_dev *)malloc (sizeof (struct mii_dev) + name_len + 1); |
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98 | |
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99 | if (new_dev == NULL) { |
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100 | printf ("miiphy_register: cannot allocate memory for '%s'\n", |
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101 | name); |
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102 | return; |
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103 | } |
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104 | memset (new_dev, 0, sizeof (struct mii_dev) + name_len); |
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105 | |
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106 | /* initalize mii_dev struct fields */ |
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107 | INIT_LIST_HEAD (&new_dev->link); |
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108 | new_dev->read = read; |
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109 | new_dev->write = write; |
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110 | new_dev->name = (char *)(new_dev + 1); |
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111 | strncpy (new_dev->name, name, name_len); |
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112 | new_dev->name[name_len] = '\0'; |
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113 | |
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114 | debug ("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n", |
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115 | new_dev->name, new_dev->read, new_dev->write); |
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116 | |
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117 | /* add it to the list */ |
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118 | list_add_tail (&new_dev->link, &mii_devs); |
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119 | |
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120 | if (!current_mii) |
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121 | current_mii = new_dev; |
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122 | } |
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123 | |
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124 | int miiphy_set_current_dev (char *devname) |
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125 | { |
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126 | struct list_head *entry; |
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127 | struct mii_dev *dev; |
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128 | |
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129 | list_for_each (entry, &mii_devs) { |
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130 | dev = list_entry (entry, struct mii_dev, link); |
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131 | |
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132 | if (strcmp (devname, dev->name) == 0) { |
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133 | current_mii = dev; |
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134 | return 0; |
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135 | } |
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136 | } |
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137 | |
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138 | printf ("No such device: %s\n", devname); |
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139 | return 1; |
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140 | } |
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141 | |
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142 | char *miiphy_get_current_dev () |
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143 | { |
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144 | if (current_mii) |
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145 | return current_mii->name; |
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146 | |
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147 | return NULL; |
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148 | } |
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149 | |
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150 | /***************************************************************************** |
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151 | * |
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152 | * Read to variable <value> from the PHY attached to device <devname>, |
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153 | * use PHY address <addr> and register <reg>. |
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154 | * |
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155 | * Returns: |
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156 | * 0 on success |
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157 | */ |
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158 | int miiphy_read (char *devname, unsigned char addr, unsigned char reg, |
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159 | unsigned short *value) |
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160 | { |
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161 | struct list_head *entry; |
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162 | struct mii_dev *dev; |
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163 | int found_dev = 0; |
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164 | int read_ret = 0; |
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165 | |
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166 | if (!devname) { |
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167 | printf ("NULL device name!\n"); |
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168 | return 1; |
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169 | } |
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170 | |
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171 | list_for_each (entry, &mii_devs) { |
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172 | dev = list_entry (entry, struct mii_dev, link); |
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173 | |
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174 | if (strcmp (devname, dev->name) == 0) { |
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175 | found_dev = 1; |
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176 | read_ret = dev->read (devname, addr, reg, value); |
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177 | break; |
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178 | } |
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179 | } |
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180 | |
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181 | if (found_dev == 0) |
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182 | printf ("No such device: %s\n", devname); |
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183 | |
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184 | return ((found_dev) ? read_ret : 1); |
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185 | } |
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186 | |
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187 | /***************************************************************************** |
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188 | * |
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189 | * Write <value> to the PHY attached to device <devname>, |
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190 | * use PHY address <addr> and register <reg>. |
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191 | * |
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192 | * Returns: |
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193 | * 0 on success |
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194 | */ |
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195 | int miiphy_write (char *devname, unsigned char addr, unsigned char reg, |
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196 | unsigned short value) |
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197 | { |
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198 | struct list_head *entry; |
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199 | struct mii_dev *dev; |
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200 | int found_dev = 0; |
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201 | int write_ret = 0; |
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202 | |
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203 | if (!devname) { |
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204 | printf ("NULL device name!\n"); |
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205 | return 1; |
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206 | } |
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207 | |
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208 | list_for_each (entry, &mii_devs) { |
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209 | dev = list_entry (entry, struct mii_dev, link); |
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210 | |
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211 | if (strcmp (devname, dev->name) == 0) { |
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212 | found_dev = 1; |
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213 | write_ret = dev->write (devname, addr, reg, value); |
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214 | break; |
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215 | } |
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216 | } |
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217 | |
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218 | if (found_dev == 0) |
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219 | printf ("No such device: %s\n", devname); |
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220 | |
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221 | return ((found_dev) ? write_ret : 1); |
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222 | } |
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223 | |
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224 | /***************************************************************************** |
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225 | * |
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226 | * Print out list of registered MII capable devices. |
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227 | */ |
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228 | void miiphy_listdev (void) |
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229 | { |
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230 | struct list_head *entry; |
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231 | struct mii_dev *dev; |
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232 | |
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233 | puts ("MII devices: "); |
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234 | list_for_each (entry, &mii_devs) { |
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235 | dev = list_entry (entry, struct mii_dev, link); |
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236 | printf ("'%s' ", dev->name); |
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237 | } |
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238 | puts ("\n"); |
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239 | |
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240 | if (current_mii) |
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241 | printf ("Current device: '%s'\n", current_mii->name); |
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242 | } |
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243 | |
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244 | /***************************************************************************** |
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245 | * |
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246 | * Read the OUI, manufacture's model number, and revision number. |
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247 | * |
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248 | * OUI: 22 bits (unsigned int) |
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249 | * Model: 6 bits (unsigned char) |
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250 | * Revision: 4 bits (unsigned char) |
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251 | * |
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252 | * Returns: |
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253 | * 0 on success |
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254 | */ |
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255 | int miiphy_info (char *devname, unsigned char addr, unsigned int *oui, |
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256 | unsigned char *model, unsigned char *rev) |
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257 | { |
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258 | unsigned int reg = 0; |
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259 | unsigned short tmp; |
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260 | |
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261 | if (miiphy_read (devname, addr, PHY_PHYIDR2, &tmp) != 0) { |
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262 | debug ("PHY ID register 2 read failed\n"); |
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263 | return (-1); |
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264 | } |
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265 | reg = tmp; |
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266 | |
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267 | debug ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg); |
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268 | |
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269 | if (reg == 0xFFFF) { |
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270 | /* No physical device present at this address */ |
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271 | return (-1); |
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272 | } |
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273 | |
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274 | if (miiphy_read (devname, addr, PHY_PHYIDR1, &tmp) != 0) { |
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275 | debug ("PHY ID register 1 read failed\n"); |
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276 | return (-1); |
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277 | } |
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278 | reg |= tmp << 16; |
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279 | debug ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg); |
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280 | |
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281 | *oui = (reg >> 10); |
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282 | *model = (unsigned char)((reg >> 4) & 0x0000003F); |
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283 | *rev = (unsigned char)(reg & 0x0000000F); |
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284 | return (0); |
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285 | } |
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286 | |
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287 | /***************************************************************************** |
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288 | * |
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289 | * Reset the PHY. |
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290 | * Returns: |
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291 | * 0 on success |
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292 | */ |
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293 | int miiphy_reset (char *devname, unsigned char addr) |
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294 | { |
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295 | unsigned short reg; |
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296 | int loop_cnt; |
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297 | |
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298 | if (miiphy_read (devname, addr, PHY_BMCR, ®) != 0) { |
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299 | debug ("PHY status read failed\n"); |
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300 | return (-1); |
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301 | } |
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302 | if (miiphy_write (devname, addr, PHY_BMCR, reg | 0x8000) != 0) { |
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303 | debug ("PHY reset failed\n"); |
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304 | return (-1); |
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305 | } |
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306 | #ifdef CONFIG_PHY_RESET_DELAY |
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307 | udelay (CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ |
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308 | #endif |
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309 | /* |
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310 | * Poll the control register for the reset bit to go to 0 (it is |
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311 | * auto-clearing). This should happen within 0.5 seconds per the |
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312 | * IEEE spec. |
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313 | */ |
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314 | loop_cnt = 0; |
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315 | reg = 0x8000; |
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316 | while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) { |
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317 | if (miiphy_read (devname, addr, PHY_BMCR, ®) != 0) { |
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318 | debug ("PHY status read failed\n"); |
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319 | return (-1); |
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320 | } |
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321 | } |
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322 | if ((reg & 0x8000) == 0) { |
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323 | return (0); |
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324 | } else { |
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325 | puts ("PHY reset timed out\n"); |
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326 | return (-1); |
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327 | } |
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328 | return (0); |
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329 | } |
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330 | |
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331 | /***************************************************************************** |
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332 | * |
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333 | * Determine the ethernet speed (10/100/1000). Return 10 on error. |
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334 | */ |
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335 | int miiphy_speed (char *devname, unsigned char addr) |
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336 | { |
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337 | u16 bmcr, anlpar; |
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338 | |
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339 | #if defined(CONFIG_PHY_GIGE) |
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340 | u16 btsr; |
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341 | |
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342 | /* |
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343 | * Check for 1000BASE-X. If it is supported, then assume that the speed |
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344 | * is 1000. |
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345 | */ |
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346 | if (miiphy_is_1000base_x (devname, addr)) { |
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347 | return _1000BASET; |
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348 | } |
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349 | /* |
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350 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. |
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351 | */ |
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352 | /* Check for 1000BASE-T. */ |
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353 | if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) { |
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354 | printf ("PHY 1000BT status"); |
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355 | goto miiphy_read_failed; |
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356 | } |
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357 | if (btsr != 0xFFFF && |
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358 | (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) { |
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359 | return _1000BASET; |
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360 | } |
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361 | #endif /* CONFIG_PHY_GIGE */ |
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362 | |
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363 | /* Check Basic Management Control Register first. */ |
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364 | if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) { |
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365 | printf ("PHY speed"); |
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366 | goto miiphy_read_failed; |
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367 | } |
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368 | /* Check if auto-negotiation is on. */ |
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369 | if (bmcr & PHY_BMCR_AUTON) { |
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370 | /* Get auto-negotiation results. */ |
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371 | if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) { |
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372 | printf ("PHY AN speed"); |
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373 | goto miiphy_read_failed; |
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374 | } |
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375 | return (anlpar & PHY_ANLPAR_100) ? _100BASET : _10BASET; |
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376 | } |
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377 | /* Get speed from basic control settings. */ |
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378 | return (bmcr & PHY_BMCR_100MB) ? _100BASET : _10BASET; |
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379 | |
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380 | miiphy_read_failed: |
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381 | printf (" read failed, assuming 10BASE-T\n"); |
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382 | return _10BASET; |
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383 | } |
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384 | |
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385 | /***************************************************************************** |
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386 | * |
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387 | * Determine full/half duplex. Return half on error. |
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388 | */ |
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389 | int miiphy_duplex (char *devname, unsigned char addr) |
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390 | { |
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391 | u16 bmcr, anlpar; |
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392 | |
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393 | #if defined(CONFIG_PHY_GIGE) |
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394 | u16 btsr; |
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395 | |
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396 | /* Check for 1000BASE-X. */ |
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397 | if (miiphy_is_1000base_x (devname, addr)) { |
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398 | /* 1000BASE-X */ |
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399 | if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) { |
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400 | printf ("1000BASE-X PHY AN duplex"); |
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401 | goto miiphy_read_failed; |
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402 | } |
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403 | } |
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404 | /* |
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405 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. |
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406 | */ |
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407 | /* Check for 1000BASE-T. */ |
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408 | if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) { |
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409 | printf ("PHY 1000BT status"); |
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410 | goto miiphy_read_failed; |
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411 | } |
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412 | if (btsr != 0xFFFF) { |
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413 | if (btsr & PHY_1000BTSR_1000FD) { |
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414 | return FULL; |
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415 | } else if (btsr & PHY_1000BTSR_1000HD) { |
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416 | return HALF; |
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417 | } |
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418 | } |
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419 | #endif /* CONFIG_PHY_GIGE */ |
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420 | |
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421 | /* Check Basic Management Control Register first. */ |
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422 | if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) { |
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423 | puts ("PHY duplex"); |
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424 | goto miiphy_read_failed; |
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425 | } |
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426 | /* Check if auto-negotiation is on. */ |
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427 | if (bmcr & PHY_BMCR_AUTON) { |
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428 | /* Get auto-negotiation results. */ |
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429 | if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) { |
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430 | puts ("PHY AN duplex"); |
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431 | goto miiphy_read_failed; |
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432 | } |
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433 | return (anlpar & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) ? |
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434 | FULL : HALF; |
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435 | } |
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436 | /* Get speed from basic control settings. */ |
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437 | return (bmcr & PHY_BMCR_DPLX) ? FULL : HALF; |
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438 | |
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439 | miiphy_read_failed: |
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440 | printf (" read failed, assuming half duplex\n"); |
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441 | return HALF; |
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442 | } |
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443 | |
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444 | /***************************************************************************** |
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445 | * |
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446 | * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/ |
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447 | * 1000BASE-T, or on error. |
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448 | */ |
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449 | int miiphy_is_1000base_x (char *devname, unsigned char addr) |
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450 | { |
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451 | #if defined(CONFIG_PHY_GIGE) |
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452 | u16 exsr; |
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453 | |
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454 | if (miiphy_read (devname, addr, PHY_EXSR, &exsr)) { |
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455 | printf ("PHY extended status read failed, assuming no " |
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456 | "1000BASE-X\n"); |
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457 | return 0; |
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458 | } |
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459 | return 0 != (exsr & (PHY_EXSR_1000XF | PHY_EXSR_1000XH)); |
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460 | #else |
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461 | return 0; |
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462 | #endif |
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463 | } |
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464 | |
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465 | #ifdef CFG_FAULT_ECHO_LINK_DOWN |
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466 | /***************************************************************************** |
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467 | * |
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468 | * Determine link status |
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469 | */ |
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470 | int miiphy_link (char *devname, unsigned char addr) |
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471 | { |
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472 | unsigned short reg; |
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473 | |
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474 | /* dummy read; needed to latch some phys */ |
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475 | (void)miiphy_read (devname, addr, PHY_BMSR, ®); |
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476 | if (miiphy_read (devname, addr, PHY_BMSR, ®)) { |
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477 | puts ("PHY_BMSR read failed, assuming no link\n"); |
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478 | return (0); |
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479 | } |
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480 | |
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481 | /* Determine if a link is active */ |
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482 | if ((reg & PHY_BMSR_LS) != 0) { |
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483 | return (1); |
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484 | } else { |
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485 | return (0); |
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486 | } |
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487 | } |
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488 | #endif |
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