source: SVN/rincon/u-boot/cpu/arm920t/ks8695/lowlevel_init.S @ 55

Last change on this file since 55 was 55, checked in by Tim Harvey, 22 months ago

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Signed-off-by: Tim Harvey <tharvey@…>

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1/*
2 *  lowlevel_init.S - basic hardware initialization for the KS8695 CPU
3 *
4 *  Copyright (c) 2004-2005, Greg Ungerer <greg.ungerer@opengear.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <config.h>
26#include <version.h>
27#include <asm/arch/platform.h>
28
29#ifndef CONFIG_SKIP_LOWLEVEL_INIT
30
31/*
32 *************************************************************************
33 *
34 * Handy dandy macros
35 *
36 *************************************************************************
37 */
38
39/* Delay a bit */
40.macro DELAY_FOR cycles, reg0
41        ldr     \reg0, =\cycles
42        subs    \reg0, \reg0, #1
43        subne   pc,  pc, #0xc
44.endm
45
46/*
47 *************************************************************************
48 *
49 * Some local storage.
50 *
51 *************************************************************************
52 */
53
54/* Should we boot with an interactive console or not */
55.globl serial_console
56
57/*
58 *************************************************************************
59 *
60 * Raw hardware initialization code. The important thing is to get
61 * SDRAM setup and running. We do some other basic things here too,
62 * like getting the PLL set for high speed, and init the LEDs.
63 *
64 *************************************************************************
65 */
66
67.globl lowlevel_init
68lowlevel_init:
69
70#if DEBUG
71        /*
72         * enable UART for early debug trace
73         */
74        ldr     r1, =(KS8695_IO_BASE+KS8695_UART_DIVISOR)
75        mov     r2, #0xd9
76        str     r2, [r1]                /* 115200 baud */
77        ldr     r1, =(KS8695_IO_BASE+KS8695_UART_LINE_CTRL)
78        mov     r2, #0x03
79        str     r2, [r1]                /* 8 data bits, no parity, 1 stop */
80        ldr     r1, =(KS8695_IO_BASE+KS8695_UART_TX_HOLDING)
81        mov     r2, #0x41
82        str     r2, [r1]                /* write 'A' */
83#endif
84#if DEBUG
85        ldr     r1, =(KS8695_IO_BASE+KS8695_UART_TX_HOLDING)
86        mov     r2, #0x42
87        str     r2, [r1]
88#endif
89
90        /*
91         * remap the memory and flash regions. we want to end up with
92         * ram from address 0, and flash at 32MB.
93         */
94        ldr     r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL0)
95        ldr     r2, =0xbfc00040
96        str     r2, [r1]                /* large flash map */
97        ldr     pc, =(highflash+0x02000000-0x00f00000)  /* jump to high flash address */
98highflash:
99        ldr     r2, =0x8fe00040
100        str     r2, [r1]                /* remap flash range */
101
102        /*
103         * remap the second select region to the 4MB immediately after
104         * the first region. This way if you have a larger flash (say 8Mb)
105         * then you can have it all mapped nicely. Has no effect if you
106         * only have a 4Mb or smaller flash.
107         */
108        ldr     r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL1)
109        ldr     r2, =0x9fe40040
110        str     r2, [r1]                /* remap flash2 region, contiguous */
111        ldr     r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL)
112        ldr     r2, =0x30000005
113        str     r2, [r1]                /* enable both flash selects */
114
115#ifdef CONFIG_CM41xx
116        /*
117         * map the second flash chip, using the external IO lines.
118         */
119        ldr     r1, =(KS8695_IO_BASE+KS8695_IO_CTRL0)
120        ldr     r2, =0xafe80b6d
121        str     r2, [r1]                /* remap io0 region, contiguous */
122        ldr     r1, =(KS8695_IO_BASE+KS8695_IO_CTRL1)
123        ldr     r2, =0xbfec0b6d
124        str     r2, [r1]                /* remap io1 region, contiguous */
125        ldr     r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL)
126        ldr     r2, =0x30050005
127        str     r2, [r1]                /* enable second flash */
128#endif
129
130        /*
131         * before relocating, we have to setup RAM timing
132         */
133        ldr     r1, =(KS8695_IO_BASE+KS8695_SDRAM_CTRL0)
134#if (PHYS_SDRAM_1_SIZE == 0x02000000)
135        ldr     r2, =0x7fc0000e         /* 32MB */
136#else
137        ldr     r2, =0x3fc0000e         /* 16MB */
138#endif
139        str     r2, [r1]                /* configure sdram bank0 setup */
140        ldr     r1, =(KS8695_IO_BASE+KS8695_SDRAM_CTRL1)
141        mov     r2, #0
142        str     r2, [r1]                /* configure sdram bank1 setup */
143
144        ldr     r1, =(KS8695_IO_BASE+KS8695_SDRAM_GENERAL)
145        ldr     r2, =0x0000000a
146        str     r2, [r1]                /* set RAS/CAS timing */
147
148        ldr     r1, =(KS8695_IO_BASE+KS8695_SDRAM_BUFFER)
149        ldr     r2, =0x00030000
150        str     r2, [r1]                /* send NOP command */
151        DELAY_FOR 0x100, r0
152        ldr     r2, =0x00010000
153        str     r2, [r1]                /* send PRECHARGE-ALL */
154        DELAY_FOR 0x100, r0
155
156        ldr     r1, =(KS8695_IO_BASE+KS8695_SDRAM_REFRESH)
157        ldr     r2, =0x00000020
158        str     r2, [r1]                /* set for fast refresh */
159        DELAY_FOR 0x100, r0
160        ldr     r2, =0x00000190
161        str     r2, [r1]                /* set normal refresh timing */
162
163        ldr     r1, =(KS8695_IO_BASE+KS8695_SDRAM_BUFFER)
164        ldr     r2, =0x00020033
165        str     r2, [r1]                /* send mode command */
166        DELAY_FOR 0x100, r0
167        ldr     r2, =0x01f00000
168        str     r2, [r1]                /* enable sdram fifos */
169
170        /*
171         * set pll to top speed
172         */
173        ldr     r1, =(KS8695_IO_BASE+KS8695_SYSTEN_BUS_CLOCK)
174        mov     r2, #0
175        str     r2, [r1]                /* set pll clock to 166MHz */
176
177        ldr     r1, =(KS8695_IO_BASE+KS8695_SWITCH_CTRL0)
178        ldr     r2, [r1]                /* Get switch ctrl0 register       */
179        and     r2, r2, #0x0fc00000     /* Mask out LED control bits       */
180        orr     r2, r2, #0x01800000     /* Set Link/activity/speed actions */
181        str     r2, [r1]
182
183#ifdef CONFIG_CM4008
184        ldr     r1, =(KS8695_IO_BASE+KS8695_GPIO_MODE)
185        ldr     r2, =0x0000fe30
186        str     r2, [r1]                /* enable LED's as outputs          */
187        ldr     r1, =(KS8695_IO_BASE+KS8695_GPIO_DATA)
188        ldr     r2, =0x0000fe20
189        str     r2, [r1]                /* turn on power LED                */
190#endif
191#if defined(CONFIG_CM4008) || defined(CONFIG_CM41xx)
192        ldr     r2, [r1]                /* get current GPIO input data      */
193        tst     r2, #0x8                /* check if "erase" depressed       */
194        beq     nobutton
195        mov     r2, #0                  /* be quiet on boot, no console     */
196        ldr     r1, =serial_console
197        str     r2, [r1]
198nobutton:
199#endif
200
201        add     lr, lr, #0x02000000     /* flash is now mapped high */
202        add     ip, ip, #0x02000000     /* this is a hack */
203        mov     pc, lr                  /* all done, return */
204
205#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
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