source: SVN/rincon/u-boot/cpu/arm926ejs/davinci/lxt972.c @ 55

Last change on this file since 55 was 55, checked in by Tim Harvey, 22 months ago

rincon: added latest u-boot source

restored form server backup

Signed-off-by: Tim Harvey <tharvey@…>

File size: 3.1 KB
Line 
1/*
2 * Intel LXT971/LXT972 PHY Driver for TI DaVinci
3 * (TMS320DM644x) based boards.
4 *
5 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6 *
7 * --------------------------------------------------------
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29#include <net.h>
30#include <miiphy.h>
31#include <lxt971a.h>
32#include <asm/arch/emac_defs.h>
33
34#ifdef CONFIG_DRIVER_TI_EMAC
35
36#ifdef CONFIG_CMD_NET
37
38int lxt972_is_phy_connected(int phy_addr)
39{
40        u_int16_t id1, id2;
41
42        if (!davinci_eth_phy_read(phy_addr, PHY_PHYIDR1, &id1))
43                return(0);
44        if (!davinci_eth_phy_read(phy_addr, PHY_PHYIDR2, &id2))
45                return(0);
46
47        if ((id1 == (0x0013)) && ((id2  & 0xfff0) == 0x78e0))
48                return(1);
49
50        return(0);
51}
52
53int lxt972_get_link_speed(int phy_addr)
54{
55        u_int16_t stat1, tmp;
56        volatile emac_regs *emac = (emac_regs *)EMAC_BASE_ADDR;
57
58        if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_STAT2, &stat1))
59                return(0);
60
61        if (!(stat1 & PHY_LXT971_STAT2_LINK))   /* link up? */
62                return(0);
63
64        if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp))
65                return(0);
66
67        tmp |= PHY_LXT971_DIG_CFG_MII_DRIVE;
68
69        davinci_eth_phy_write(phy_addr, PHY_LXT971_DIG_CFG, tmp);
70        /* Read back */
71        if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp))
72                return(0);
73
74        /* Speed doesn't matter, there is no setting for it in EMAC... */
75        if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
76                /* set DM644x EMAC for Full Duplex  */
77                emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE |
78                        EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
79        } else {
80                /*set DM644x EMAC for Half Duplex  */
81                emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE;
82        }
83
84        return(1);
85}
86
87
88int lxt972_init_phy(int phy_addr)
89{
90        int ret = 1;
91
92        if (!lxt972_get_link_speed(phy_addr)) {
93                /* Try another time */
94                ret = lxt972_get_link_speed(phy_addr);
95        }
96
97        /* Disable PHY Interrupts */
98        davinci_eth_phy_write(phy_addr, PHY_LXT971_INT_ENABLE, 0);
99
100        return(ret);
101}
102
103
104int lxt972_auto_negotiate(int phy_addr)
105{
106        u_int16_t tmp;
107
108        if (!davinci_eth_phy_read(phy_addr, PHY_BMCR, &tmp))
109                return(0);
110
111        /* Restart Auto_negotiation  */
112        tmp |= PHY_BMCR_RST_NEG;
113        davinci_eth_phy_write(phy_addr, PHY_BMCR, tmp);
114
115        /*check AutoNegotiate complete */
116        udelay (10000);
117        if (!davinci_eth_phy_read(phy_addr, PHY_BMSR, &tmp))
118                return(0);
119
120        if (!(tmp & PHY_BMSR_AUTN_COMP))
121                return(0);
122
123        return (lxt972_get_link_speed(phy_addr));
124}
125
126#endif  /* CONFIG_CMD_NET */
127
128#endif  /* CONFIG_DRIVER_ETHER */
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