1 | /* |
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2 | * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de> |
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3 | * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com> |
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4 | * |
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5 | * See file CREDITS for list of people who contributed to this |
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6 | * project. |
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7 | * |
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8 | * This program is free software; you can redistribute it and/or |
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9 | * modify it under the terms of the GNU General Public License as |
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10 | * published by the Free Software Foundation; either version 2 of |
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11 | * the License, or (at your option) any later version. |
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12 | * |
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13 | * This program is distributed in the hope that it will be useful, |
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14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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16 | * GNU General Public License for more details. |
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17 | * |
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18 | * You should have received a copy of the GNU General Public License |
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19 | * along with this program; if not, write to the Free Software |
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20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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21 | * MA 02111-1307 USA |
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22 | */ |
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23 | |
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24 | #include <config.h> |
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25 | #include "version.h" |
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26 | |
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27 | #ifndef CONFIG_IDENT_STRING |
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28 | #define CONFIG_IDENT_STRING "" |
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29 | #endif |
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30 | |
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31 | /* last three long word reserved for cache status */ |
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32 | #define ICACHE_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END- 4) |
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33 | #define DCACHE_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END- 8) |
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34 | #define CACR_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-12) |
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35 | |
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36 | #define _START _start |
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37 | #define _FAULT _fault |
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38 | |
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39 | #define SAVE_ALL \ |
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40 | move.w #0x2700,%sr; /* disable intrs */ \ |
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41 | subl #60,%sp; /* space for 15 regs */ \ |
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42 | moveml %d0-%d7/%a0-%a6,%sp@; |
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43 | |
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44 | #define RESTORE_ALL \ |
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45 | moveml %sp@,%d0-%d7/%a0-%a6; \ |
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46 | addl #60,%sp; /* space for 15 regs */ \ |
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47 | rte; |
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48 | |
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49 | .text |
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50 | /* |
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51 | * Vector table. This is used for initial platform startup. |
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52 | * These vectors are to catch any un-intended traps. |
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53 | */ |
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54 | _vectors: |
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55 | |
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56 | INITSP: .long 0x00000000 /* Initial SP */ |
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57 | INITPC: .long _START /* Initial PC */ |
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58 | vector02: .long _FAULT /* Access Error */ |
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59 | vector03: .long _FAULT /* Address Error */ |
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60 | vector04: .long _FAULT /* Illegal Instruction */ |
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61 | vector05: .long _FAULT /* Reserved */ |
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62 | vector06: .long _FAULT /* Reserved */ |
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63 | vector07: .long _FAULT /* Reserved */ |
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64 | vector08: .long _FAULT /* Privilege Violation */ |
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65 | vector09: .long _FAULT /* Trace */ |
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66 | vector0A: .long _FAULT /* Unimplemented A-Line */ |
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67 | vector0B: .long _FAULT /* Unimplemented F-Line */ |
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68 | vector0C: .long _FAULT /* Debug Interrupt */ |
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69 | vector0D: .long _FAULT /* Reserved */ |
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70 | vector0E: .long _FAULT /* Format Error */ |
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71 | vector0F: .long _FAULT /* Unitialized Int. */ |
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72 | |
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73 | /* Reserved */ |
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74 | vector10_17: |
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75 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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76 | |
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77 | vector18: .long _FAULT /* Spurious Interrupt */ |
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78 | vector19: .long _FAULT /* Autovector Level 1 */ |
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79 | vector1A: .long _FAULT /* Autovector Level 2 */ |
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80 | vector1B: .long _FAULT /* Autovector Level 3 */ |
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81 | vector1C: .long _FAULT /* Autovector Level 4 */ |
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82 | vector1D: .long _FAULT /* Autovector Level 5 */ |
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83 | vector1E: .long _FAULT /* Autovector Level 6 */ |
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84 | vector1F: .long _FAULT /* Autovector Level 7 */ |
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85 | |
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86 | /* TRAP #0 - #15 */ |
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87 | vector20_2F: |
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88 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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89 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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90 | |
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91 | /* Reserved */ |
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92 | vector30_3F: |
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93 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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94 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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95 | |
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96 | vector64_127: |
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97 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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98 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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99 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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100 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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101 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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102 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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103 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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104 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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105 | |
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106 | vector128_191: |
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107 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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108 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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109 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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110 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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111 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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112 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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113 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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114 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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115 | |
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116 | vector192_255: |
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117 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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118 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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119 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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120 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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121 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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122 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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123 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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124 | .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT |
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125 | |
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126 | .text |
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127 | |
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128 | .globl _start |
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129 | _start: |
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130 | nop |
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131 | nop |
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132 | move.w #0x2700,%sr /* Mask off Interrupt */ |
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133 | |
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134 | /* Set vector base register at the beginning of the Flash */ |
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135 | move.l #CFG_FLASH_BASE, %d0 |
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136 | movec %d0, %VBR |
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137 | |
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138 | move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0 |
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139 | movec %d0, %RAMBAR1 |
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140 | |
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141 | /* initialize general use internal ram */ |
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142 | move.l #0, %d0 |
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143 | move.l #(ICACHE_STATUS), %a1 /* icache */ |
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144 | move.l #(DCACHE_STATUS), %a2 /* icache */ |
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145 | move.l #(CACR_STATUS), %a3 /* CACR */ |
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146 | move.l %d0, (%a1) |
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147 | move.l %d0, (%a2) |
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148 | move.l %d0, (%a3) |
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149 | |
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150 | /* invalidate and disable cache */ |
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151 | move.l #0x01000000, %d0 /* Invalidate cache cmd */ |
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152 | movec %d0, %CACR /* Invalidate cache */ |
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153 | move.l #0, %d0 |
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154 | movec %d0, %ACR0 |
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155 | movec %d0, %ACR1 |
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156 | |
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157 | /* set stackpointer to end of internal ram to get some stackspace for |
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158 | the first c-code */ |
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159 | move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp |
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160 | clr.l %sp@- |
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161 | |
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162 | move.l #__got_start, %a5 /* put relocation table address to a5 */ |
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163 | |
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164 | bsr cpu_init_f /* run low-level CPU init code (from flash) */ |
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165 | bsr board_init_f /* run low-level board init code (from flash) */ |
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166 | |
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167 | /* board_init_f() does not return */ |
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168 | |
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169 | /*------------------------------------------------------------------------------*/ |
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170 | |
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171 | /* |
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172 | * void relocate_code (addr_sp, gd, addr_moni) |
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173 | * |
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174 | * This "function" does not return, instead it continues in RAM |
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175 | * after relocating the monitor code. |
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176 | * |
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177 | * r3 = dest |
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178 | * r4 = src |
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179 | * r5 = length in bytes |
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180 | * r6 = cachelinesize |
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181 | */ |
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182 | .globl relocate_code |
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183 | relocate_code: |
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184 | link.w %a6,#0 |
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185 | move.l 8(%a6), %sp /* set new stack pointer */ |
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186 | |
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187 | move.l 12(%a6), %d0 /* Save copy of Global Data pointer */ |
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188 | move.l 16(%a6), %a0 /* Save copy of Destination Address */ |
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189 | |
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190 | move.l #CFG_MONITOR_BASE, %a1 |
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191 | move.l #__init_end, %a2 |
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192 | move.l %a0, %a3 |
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193 | |
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194 | /* copy the code to RAM */ |
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195 | 1: |
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196 | move.l (%a1)+, (%a3)+ |
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197 | cmp.l %a1,%a2 |
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198 | bgt.s 1b |
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199 | |
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200 | /* |
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201 | * We are done. Do not return, instead branch to second part of board |
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202 | * initialization, now running from RAM. |
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203 | */ |
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204 | move.l %a0, %a1 |
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205 | add.l #(in_ram - CFG_MONITOR_BASE), %a1 |
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206 | jmp (%a1) |
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207 | |
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208 | in_ram: |
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209 | |
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210 | clear_bss: |
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211 | /* |
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212 | * Now clear BSS segment |
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213 | */ |
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214 | move.l %a0, %a1 |
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215 | add.l #(_sbss - CFG_MONITOR_BASE),%a1 |
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216 | move.l %a0, %d1 |
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217 | add.l #(_ebss - CFG_MONITOR_BASE),%d1 |
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218 | 6: |
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219 | clr.l (%a1)+ |
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220 | cmp.l %a1,%d1 |
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221 | bgt.s 6b |
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222 | |
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223 | /* |
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224 | * fix got table in RAM |
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225 | */ |
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226 | move.l %a0, %a1 |
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227 | add.l #(__got_start - CFG_MONITOR_BASE),%a1 |
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228 | move.l %a1,%a5 /* * fix got pointer register a5 */ |
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229 | |
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230 | move.l %a0, %a2 |
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231 | add.l #(__got_end - CFG_MONITOR_BASE),%a2 |
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232 | |
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233 | 7: |
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234 | move.l (%a1),%d1 |
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235 | sub.l #_start,%d1 |
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236 | add.l %a0,%d1 |
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237 | move.l %d1,(%a1)+ |
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238 | cmp.l %a2, %a1 |
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239 | bne 7b |
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240 | |
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241 | /* calculate relative jump to board_init_r in ram */ |
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242 | move.l %a0, %a1 |
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243 | add.l #(board_init_r - CFG_MONITOR_BASE), %a1 |
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244 | |
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245 | /* set parameters for board_init_r */ |
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246 | move.l %a0,-(%sp) /* dest_addr */ |
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247 | move.l %d0,-(%sp) /* gd */ |
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248 | jsr (%a1) |
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249 | |
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250 | /*------------------------------------------------------------------------------*/ |
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251 | /* exception code */ |
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252 | .globl _fault |
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253 | _fault: |
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254 | jmp _fault |
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255 | .globl _exc_handler |
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256 | |
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257 | _exc_handler: |
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258 | SAVE_ALL |
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259 | movel %sp,%sp@- |
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260 | bsr exc_handler |
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261 | addql #4,%sp |
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262 | RESTORE_ALL |
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263 | |
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264 | .globl _int_handler |
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265 | _int_handler: |
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266 | SAVE_ALL |
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267 | movel %sp,%sp@- |
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268 | bsr int_handler |
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269 | addql #4,%sp |
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270 | RESTORE_ALL |
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271 | |
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272 | /*------------------------------------------------------------------------------*/ |
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273 | /* cache functions */ |
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274 | .globl icache_enable |
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275 | icache_enable: |
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276 | move.l #0x01200000, %d0 /* Invalid cache */ |
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277 | movec %d0, %CACR |
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278 | |
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279 | move.l #(CFG_SDRAM_BASE + 0x1c000), %d0 |
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280 | movec %d0, %ACR0 |
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281 | |
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282 | move.l #0x81600610, %d0 /* Enable cache */ |
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283 | movec %d0, %CACR |
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284 | |
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285 | move.l #(ICACHE_STATUS), %a1 |
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286 | moveq #1, %d0 |
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287 | move.l %d0, (%a1) |
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288 | rts |
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289 | |
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290 | .globl icache_disable |
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291 | icache_disable: |
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292 | move.l #0x01F00000, %d0 /* Setup cache mask */ |
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293 | movec %d0, %CACR /* Invalidate icache */ |
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294 | clr.l %d0 |
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295 | movec %d0, %ACR0 |
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296 | movec %d0, %ACR1 |
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297 | |
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298 | move.l #(ICACHE_STATUS), %a1 |
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299 | moveq #0, %d0 |
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300 | move.l %d0, (%a1) |
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301 | rts |
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302 | |
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303 | .globl icache_status |
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304 | icache_status: |
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305 | move.l #(ICACHE_STATUS), %a1 |
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306 | move.l (%a1), %d0 |
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307 | rts |
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308 | |
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309 | .globl icache_invalid |
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310 | icache_invalid: |
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311 | move.l #0x80600610, %d0 /* Invalidate icache */ |
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312 | movec %d0, %CACR /* Enable and invalidate cache */ |
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313 | rts |
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314 | |
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315 | .globl dcache_enable |
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316 | dcache_enable: |
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317 | move.l #0x01200000, %d0 /* Invalid cache */ |
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318 | movec %d0, %CACR |
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319 | |
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320 | move.l #0x81300610, %d0 |
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321 | movec %d0, %CACR |
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322 | |
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323 | move.l #(DCACHE_STATUS), %a1 |
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324 | moveq #1, %d0 |
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325 | move.l %d0, (%a1) |
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326 | rts |
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327 | |
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328 | .globl dcache_disable |
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329 | dcache_disable: |
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330 | move.l #0x81600610, %d0 /* Setup cache mask */ |
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331 | movec %d0, %CACR /* Invalidate icache */ |
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332 | |
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333 | move.l #(DCACHE_STATUS), %a1 |
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334 | moveq #0, %d0 |
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335 | move.l %d0, (%a1) |
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336 | rts |
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337 | |
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338 | .globl dcache_invalid |
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339 | dcache_invalid: |
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340 | move.l #0x81100610, %d0 /* Setup cache mask */ |
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341 | movec %d0, %CACR /* Enable and invalidate cache */ |
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342 | rts |
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343 | |
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344 | .globl dcache_status |
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345 | dcache_status: |
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346 | move.l #(DCACHE_STATUS), %a1 |
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347 | move.l (%a1), %d0 |
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348 | rts |
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349 | |
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350 | /*------------------------------------------------------------------------------*/ |
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351 | |
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352 | .globl version_string |
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353 | version_string: |
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354 | .ascii U_BOOT_VERSION |
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355 | .ascii " (", __DATE__, " - ", __TIME__, ")" |
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356 | .ascii CONFIG_IDENT_STRING, "\0" |
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357 | .align 4 |
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