source: SVN/rincon/u-boot/cpu/mpc8220/i2cCore.h @ 55

Last change on this file since 55 was 55, checked in by Tim Harvey, 22 months ago

rincon: added latest u-boot source

restored form server backup

Signed-off-by: Tim Harvey <tharvey@…>

File size: 3.8 KB
Line 
1/*
2 * i2cCore.h
3 *
4 * Prototypes, etc. for the Motorola MPC8220
5 * embedded cpu chips
6 *
7 * 2004 (c) Freescale, Inc.
8 * Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28#ifndef __INCi2ccoreh
29#define __INCi2ccoreh
30#ifndef __ASSEMBLY__
31/* device types */
32#define I2C_DEVICE_TYPE_EEPROM 0
33#define I2C_EEPROM_ADRS 0xa0
34#define I2C_CTRL_ADRS   I2C_EEPROM_ADRS
35#define EEPROM_ADDR0    0xA2    /* on Dimm SPD eeprom */
36#define EEPROM_ADDR1    0xA4    /* on Board SPD eeprom */
37#define EEPROM_ADDR2    0xD2    /* non-standard eeprom - clock generator */
38/* Control Register */
39#define I2C_CTL_EN      0x80    /* I2C Enable                   */
40#define I2C_CTL_IEN     0x40    /* I2C Interrupt Enable         */
41#define I2C_CTL_STA     0x20    /* Master/Slave Mode select     */
42#define I2C_CTL_TX      0x10    /* Transmit/Receive Mode Select */
43#define I2C_CTL_TXAK    0x08    /* Transmit Acknowledge Enable  */
44#define I2C_CTL_RSTA    0x04    /* Repeat Start                 */
45/* Status Register */
46#define I2C_STA_CF      0x80    /* Data Transfer       */
47#define I2C_STA_AAS     0x40    /* Adressed As Slave   */
48#define I2C_STA_BB      0x20    /* Bus Busy            */
49#define I2C_STA_AL      0x10    /* Arbitration Lost    */
50#define I2C_STA_SRW     0x04    /* Slave Read/Write    */
51#define I2C_STA_IF      0x02    /* I2C Interrupt       */
52#define I2C_STA_RXAK    0x01    /* Receive Acknowledge */
53/* Interrupt Contol Register */
54#define I2C_INT_BNBE2   0x80    /* Bus Not Busy Enable 2 */
55#define I2C_INT_TE2     0x40    /* Transmit Enable 2     */
56#define I2C_INT_RE2     0x20    /* Receive Enable 2      */
57#define I2C_INT_IE2     0x10    /* Interrupt Enable 2    */
58#define I2C_INT_BNBE1   0x08    /* Bus Not Busy Enable 1 */
59#define I2C_INT_TE1     0x04    /* Transmit Enable 1     */
60#define I2C_INT_RE1     0x02    /* Receive Enable 1      */
61#define I2C_INT_IE1     0x01    /* Interrupt Enable 1    */
62#define I2C_POLL_COUNT 0x100000
63#define I2C_ENABLE      0x00000001
64#define I2C_DISABLE     0x00000002
65#define I2C_START       0x00000004
66#define I2C_REPSTART    0x00000008
67#define I2C_STOP        0x00000010
68#define I2C_BITRATE     0x00000020
69#define I2C_SLAVEADR    0x00000040
70#define I2C_STARTADR    0x00000080
71#undef TWOBYTES
72typedef struct i2c_settings {
73        /* Device settings */
74        int bit_rate;           /* Device bit rate */
75        u8 i2c_adr;             /* I2C address */
76        u8 slv_adr;             /* Slave address */
77#ifdef TWOBYTES
78        u16 str_adr;            /* Start address */
79#else
80        u8 str_adr;             /* Start address */
81#endif
82        int xfer_size;          /* Transfer Size */
83
84        int bI2c_en;            /* Enable or Disable */
85        int cmdFlag;            /* I2c Command Flags */
86} i2cset_t;
87
88/*
89int check_status(PSI2C pi2c, u8 sta_bit, u8 truefalse);
90int i2c_enable(PSI2C pi2c, PI2CSET pi2cSet);
91int i2c_disable(PSI2C pi2c);
92int i2c_start(PSI2C pi2c, PI2CSET pi2cSet);
93int i2c_stop(PSI2C pi2c);
94int i2c_clear(PSI2C pi2c);
95int i2c_readblock (PSI2C pi2c, PI2CSET pi2cSet, u8 *Data);
96int i2c_writeblock (PSI2C pi2c, PI2CSET pi2cSet, u8 *Data);
97int i2c_readbyte(PSI2C pi2c, u8 *readb, int *index);
98int i2c_writebyte(PSI2C pi2c, u8 *writeb);
99int SetI2cFDR( PSI2C pi2cRegs, int bitrate );
100*/
101#endif /* __ASSEMBLY__ */
102
103#endif /* __INCi2ccoreh */
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