wiki:MMC

Version 3 (modified by Tim Harvey, 6 years ago) ( diff )

added eMMC details

MultiMediaCard (MMC)

A MultiMediaCard (MMC) is a memory card standard used for solid-state storage typically used in digital cameras, smart-phones, and portable media players. There are several form-factors of cards that fall under the specification. MMC cards use the SDIO data bus standard.

Embedded Multi-Media Controller (eMMC)

Embedded Multi-Media Controller (eMMC) refers to a package consisting of both flash memory and a flash memory controller integrated into a single on-board chip.

eMMC is very similar to a microSD but differs in the following ways:

  • supports several hardware partitions
  • 8-bit data bus
  • device is on-board and thus non removable

Gateworks uses eMMC on several of its products:

  • Newport:
    • GW630x / GW640x: 8GiB (16MB BOOT0, 16MB BOOT1, 4MB RPMB, 7.09GiB USER)
  • Ventana:
    • GW560x: 8GiB 8GiB (16MB BOOT0, 16MB BOOT1, 4MB RPMB, 7.09GiB USER)

eMMC Partitions

eMMC devices are partitioned into several hardware partitions but only one can be selected at a time:

  • BOOT - one or more small partitions intended for boot firmware (eMMC 4.3 spec requires 2 boot and 1 user partition)
  • RPMB - Replay Protected Memory Block - intended to store secure data (ie DRM content protection keys) (eMMC 4.4 spec adds the requirement of an RPMB partition)
  • USER - a large partition intended for general storage

Notes:

  • BOOT and RPMB partitions are configured as SLC while USER can be SLC or MLC.
  • Read / Write commands sent to an eMMC do not directly address the hardware partitions but instead a special command is used to select a partition.
  • A Card Specific Data (CSD) register (EXT_CSD[179]) is used to configure what partition is selected at power-up. This can be configured within Linux via the mmc-utils application, or within U-Boot via the mmc partconf command (see below).
  • It is up to the user to decide if and how to use each of the hardware partitions.

Both Linux (see below) and U-Boot (see below) support accessing the various partitions but in different ways.

eMMC PARTITION_CONFIG (Boot partition selection)

Because eMMC provides multiple hardware partitions but only one can be selected at a time. A non-volatile register in the eMMC device provides a PARTITION_CONFIG that is used to determine what partition is selected at power-up for boot devices. To access this data you need to read/write a 'Card Specific Data' or CSD register (EXT_CSD[179] - EXT_CSC_PART_CONFIG). This can be done both in Linux (see below) or U-Boot (see below).

U-Boot Support

U-Boot provides access to eMMC devices through the mmc command and interface but adds an additional argument to the mmc interface to describe the hardware partition. The interface is therefore described as 'mmc <dev> <part>' where 'dev' is the mmc device (some boards have more than one) and 'part' is the hardware partition: 0=user, 1=boot0, 2=boot1.

Use the mmc dev command to specify the device and partition:

mmc dev 0 0 # select user hw partition
mmc dev 0 1 # select boot0 hw partition
mmc dev 0 2 # select boot1 hw partition

If U-Boot has been built with CONFIG_SUPPORT_EMMC_BOOT some additional mmc commands are available:

  • mmc bootbus <dev> <boot_bus_width> <reset_boot_bus_width> <boot_mode>
  • mmc bootpart-resize <dev> <boot-part-size-mb> <rpmb-part-size-mb>
  • mmc partconf <dev> <boot_ack> <boot-partition> <partition-access> # set PARTITION_CONFIG field
  • mmc rst-function <dev> <value> # change RST_n_FUNCTION field between 0|1|2 (write-once)

The mmc partconf command can be used to configure the PARTITION_CONFIG specifying what hardware partition to boot from:

mmc partconf 0 0 0 0 # disable boot partition (default unset condition; boots from user partition)
mmc partconf 0 1 1 0 # set boot0 partition (with ack)
mmc partconf 0 1 2 0 # set boot1 partition (with ack)
mmc partconf 0 1 7 0 # set user partition (with ack)

If U-Boot has been built with CONFIG_SUPPORT_EMMC_RPMB the mmc rpmb command is available for reading, writing and programming the key for the Replay Protection Memory Block (RPMB) partition in eMMC.

Linux Support

Linux presents the various hardware partitions as separate devices:

  • /dev/mmcblk0boot0 - BOOT0 partition
  • /dev/mmcblk0boot1 - BOOT1 partition
  • /dev/mmcblk0rpmb - RPMB partition
  • /dev/mmcblk0 - USER partition

Note that the BOOT partitions by default are read-only as they are typically used for sensitive boot firmware. To write to them you can disable force_ro in sysfs via:

echo 0 > /sys/class/block/mmcblk0boot0/force_ro

The Linux mmc application provides access to eMMC configuration through CSD registers. This open-source application is available at http://git.kernel.org/cgit/linux/kernel/git/cjb/mmc-utils.git/.

  • To build it:
    git clone git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc-utils.git
    cd mmc-utils
    make
    
  • Alternatively you can install this from a pre-built deb:
    • Newport (arm64):
      wget http://dev.gateworks.com/images/mmc-utils_0~gita3d3331-3~armbian5.35+1_arm64.deb
      dpkg -i mmc-utils_0~gita3d3331-3~armbian5.35+1_arm64.deb
      
  • Ventana (armhf):
    wget http://dev.gateworks.com/images/mmc-utils_0~gita3d3331-3~armbian5.35+1_armhf.deb
    dpkg -i mmc-utils_0~gita3d3331-3~armbian5.35+1_armhf.deb
    

You can use the mmc utility to configure the eMMC PARTITION_CONFIG to specify the boot device on power-up via mmc bootpart enable <boot_partition> <send_ack> <device> where boot_partition specifies the hardware partition (1=boot0, 2=boot1, 7=user), send_ack specifies the device must send an awknoledgement (for fast boot), and device is the root mmc block device of the eMMC:

# set boot partition to boot0
mmc bootpart enable 1 0 /dev/mmcblk0
# set boot partition to boot1
mmc bootpart enable 2 0 /dev/mmcblk0
# set boot partition to user
mmc bootpart enable 7 0 /dev/mmcblk0

Some additional use cases:

# show PARTITION_CONFIG:
mmc extcsd read /dev/mmcblk0 | grep PARTITION_CONFIG
# show BUS CONFIG:
mmc extcsd read /dev/mmcblk0 | grep BOOT_BUS_CONDITIONS
# disable boot partition
mmc bootpart enable 0 0 /dev/mmcblk0

References:

microSD

Gateworks supports microSD (aka uSD) cards on several boards in the Newport, Ventana, and Laguna product families. A microSD card operates at 3.3V (with 3.3V or 1.8V I/O if the board allows it) and uses 4bit I/O.

References:

Data Rates

The SecureDigital (SD) card spec originally defines a speed classes rating to refer to the I/O speed capabilities of the specific card. The class is specified on the card with icons that are denoted in the SD card specification. The class specified the write speed (which was important for Digital cameras) but a shortcoming of this system is it did not specify read speed.

Some examples of speed class rating:

Class Device Write Speed
class2 2MB/sec
class4 4MB/sec
class10 10MB/sec
  • Note: device read speed not specified by class - refer to manufacturer specs

The Ultra High Speed (UHS) bus introduced in version 3 of the SD specification marked by a 'UHS-I' marking on the device supports a higher clock frequency and came with a new rating system that specifies the I/O rate and not the I/O rates supported by the card.

Here are some examples:

Name Clock speed Max possible I/O rate for 4bit MMC SD spec version
DS (Default Speed) 25MHz 12.5 MB/sec 1.01
HS (High Speed) 50MHz 25 MB/sec 2.00
UHS-I SDR12 25MHz 12.5 MB/sec 3.01
UHS-I SDR25 50MHz 25 MB/sec 3.01
UHS-I SDR50 100MHz 50 MB/sec 3.01
UHS-I DDR50 50MHz 50 MB/sec 3.01
UHS-I SDR104 208MHz 104 MB/sec 3.01

SD cards are backwards compatible with respect to clocks: a card capable of UHS-I SDR104 can operate just fine in DS or HS mode.

In any case the actual achievable read/write speeds depend not only on the specified read and write rates by the card vendor but also depend on the microSD Host Controller (uSDHC) of the SoC on the board using the microSD which varies per product family. See below for product family details. References:

Newport

The OCTEON TX CN80XX / CN81XX SoC has a single MMC host controller supporting 3 CMD signals which allows up to three devices to share the bus. Some Newport products support a combination of microSD and on-board eMMC. The MMC host controller supports:

  • 1, 4, 8-bit data bus (8-bit used for eMMC, 4-bit used for microSD)
  • transfer rates up to 52MHz
  • single-data rate (SDR) and dual-data rate (DDR)
  • DMA read/write on 512byte blocks
  • stream mode is not supported but multiblock read/write operations are supported
  • SPI mode not supported
  • BOOT ROM supports booting from MMC

Newport boards supporting microSD have a connector that supports both SIM and microSD in one.

Ventana

Ventana boards supporting microSD have a connector that supports both SIM and microSD in one. The microSD card offers the following support: Fully compliant with SD command/response sets and Physical Layer as defined in the SD Memory Card Specifications, v3.0 including high-capacity SDHC cards up to 32 GB and SDXC cards up to 2TB.

The Freescale IMX6 SoC used on Ventana has an SD host controller that supports up to a 208MHz clock necessary for UHS-I SDR104 however this requires a microSD I/O voltage rail that is switchable between 1.8V and 3.3V which is available only on select Ventana board models (see below). If UHS-I clocking is not available a UHS-I card will be used in HS mode with a 50MHz clock resulting in a theoretical maximum I/O rate of 25MB/sec. Actual raw device throughput (using dd commands) has shown 19.5MB/sec for cards that advertise greater than 20MB I/O when operating in HS mode.

Ventana boards that are capable of UHS-I data rates:

board model revision
GW54xx E
GW53xx E
GW520x D
GW522x B
  • Standard board models at the revision above will have UHS-I capability loaded by default, however for specials (GW5xx-SPxxx) please contact sales@… to inquire if UHS-I support is available.

From a software perspective, support for UHS-I data rates on UHS-I capable boards is available on:

  • OpenWrt 15.0x BSP based on kernel v4.1 (coming soon)
  • Yocto 1.8 BSP
  • Gateworks downstream vendor kernel v3.14.x

Laguna

The Cavium cns3xxx SoC used on Laguna has an SD host controller that supports a 50MHz max clock which results in a theoretical maximum I/O rate of 25MB/sec.

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