Changes between Version 81 and Version 82 of gsc


Ignore:
Timestamp:
07/22/2021 07:45:10 PM (14 months ago)
Author:
Cale Collins
Comment:

added note that driver will clear interupt bits

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  • gsc

    v81 v82  
    122122[=#gsc_interrupt_status]
    123123=== GSC_INTERRUPT_STATUS (Register R10): Interrupt Source
    124 The GSC includes a single active-low level-triggered interrupt connected to an interrupt input on the ARM host processor. The GSC includes several possible interrupt sources with a control register to enable the desired interrupts and a status register to determine which are active. The following bits will indicate the cause of the host interrupt assertion which will remain asserted until all enabled bits are clear.
     124The GSC includes a single active-low level-triggered interrupt connected to an interrupt input on the ARM host processor. The GSC includes several possible interrupt sources with a control register to enable the desired interrupts and a status register to determine which are active. The following bits will indicate the cause of the host interrupt assertion which will remain asserted until all enabled bits are clear. 
     125
     126** Note: These bits will be cleared automaticly by the driver **
    125127
    126128||= Bit =||= Name =||= Description =||