Changes between Version 3 and Version 4 of hailoai


Ignore:
Timestamp:
03/20/2024 11:00:00 PM (8 weeks ago)
Author:
Ryan Erbstoesser
Comment:

add more images

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  • hailoai

    v3 v4  
    44
    55They typically come in a M.2 or Mini-PCIe form factor that can be plugged into a Gateworks Single Board Computer (SBC).
     6
     7'''Please note''' that the Gateworks Venice SBCs have 1x lane of PCIe to each Mini-PCIe slot. Thus any Hailo product that can use 4x lanes will only utilize 1x lane and performance will adjust accordingly.
     8
     9Note, this page is also related to the following Gateworks Wiki pages:
     10 * [wiki:TPU]
     11
     12
     13[[Image(hailo_hailo8_m2.jpg,300px)]]
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    8997
    9098
    91 Run HEF File:
     99Run HEF File: (pre-compiled HEF (Hailo Executable Format) binary file)
    92100 * Note HEF files can be downloaded here:
    93101  * [https://github.com/hailo-ai/hailo_model_zoo/blob/master/docs/PUBLIC_MODELS.rst]
     
    175183            }
    176184          ]
     185
     186
     187== Hailo Tappas
     188
     189Hailo TAPPAS - Optimized Execution of Video-Processing Pipelines
     190TAPPAS is Hailo's set of full application examples, implementing pipeline elements and pre-trained AI tasks.
     191
     192Read more here [https://github.com/hailo-ai/tappas?tab=readme-ov-file#hailo-tappas---optimized-execution-of-video-processing-pipelines]
    177193        }
    178194      }