Changes between Version 7 and Version 8 of jtag


Ignore:
Timestamp:
08/09/2018 11:22:50 PM (15 months ago)
Author:
Tim Harvey
Comment:

remove avila/cambria/rincon data

Legend:

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  • jtag

    v7 v8  
    77Gateworks has two models of JTAG programmers:
    88
    9 '''GW16042''' - uses 14-pin, 0.1" connector for Avila, Cambria, Laguna (GW2387, GW2388, GW2391) boards.
     9'''GW16042''' - uses 14-pin, 0.1" connector for Laguna (GW2387, GW2388, GW2391) boards.
    1010
    1111'''GW16099''' - uses 10-pin, 0.05" connector for Laguna (GW2380, GW2382, GW2383), Ventana, Newport boards.
     
    4747 2. Coresight Debug Access Port v5.2 (IR Length=4bits)
    4848
    49 
    5049The Gateworks Ventana family has the following JTAG chain:
    5150 1. GSC (MSP430) (IR length=8bits, defaults to Spy-By-Wire mode on powerup)
     
    6059 3. CNS3xxx CPU (IR length=5 bits) (if dual-core product)
    6160
    62 The Gateworks Rincon family has the following JTAG chain:
    63  1. GSC (MSP430) (IR length=8bits, defaults to Spy-By-Wire mode on powerup)
    64  2. DM6446 CPU (IR length=6 bits) (in bypass mode at powerup)
    65  3. ARM9 Core (IR length=4 bits)
    66 
    67 The Gateworks Avila / Cambria family has the following JTAG chain:
    68  1. GSC (MSP430) (IR length=8bits, defaults to Spy-By-Wire mode on powerup) (only certain avila/cambria products have a GSC)
    69  2. IXP42x CPU (IR length=7 bits)
    70  3. PLD (IR length=8 bits) (only certain avila/cambria products have a PLD)
    7161
    7262== OpenOCD ==