Changes between Version 71 and Version 72 of gsc


Ignore:
Timestamp:
01/05/2021 05:42:02 PM (20 months ago)
Author:
Bobby Jones
Comment:

Add supported version lines to added register sections

Legend:

Unmodified
Added
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Modified
  • gsc

    v71 v72  
    189189[=#GSC_INTERRUPT_STATUS_1]
    190190=== GSC_INTERRUPT_STATUS_1 (Register R17): Interrupt Source 1
     191Supported on '''GSCv3 firmware v53+'''.
    191192
    192193||= Value =||= Name =||= Description =||
     
    196197[=#GSC_INTERRUPT_ENABLE_1]
    197198=== GSC_INTERRUPT_ENABLE_1 (Register R18): Interrupt Enable 1
     199Supported on '''GSCv3 firmware v53+'''.
    198200
    199201||= Value =||= Name =||= Description =||
     
    210212[=#GSC_BOOT_OPTIONS]
    211213=== GSC_BOOT_OPTIONS (Register R21): Boot Control Options
     214Supported on '''GSCv3 firmware v57+'''.
    212215
    213216||= Value =||= Name =||= Description =||
     
    216219[=#GSC_MEM_ACCESS_PAGE]
    217220=== GSC_MEM_ACCESS_PAGE (Register R22): Direct Memory Access Page Number
     221Supported on '''GSCv3 firmware v57+'''.
    218222
    219223||= Value =||= Name =||= Description =||
     
    240244[=#GSC_REGISTER_BACKUP]
    241245=== GSC_REGISTER_BACKUP (Register R31): Register Backup Control
    242 This register has an upper nibble password of value {{{0xA0}}} that should be bitwise OR'd with an enumerated value in the lower nibble that will be interpreted as the command. This register will self clear when the operation has completed. See the below [#reg_save_load Register Save/Load] section for more information.
     246Supported on '''GSCv3 firmware v57+'''. This register has an upper nibble password of value {{{0xA0}}} that should be bitwise OR'd with an enumerated value in the lower nibble that will be interpreted as the command. This register will self clear when the operation has completed. See the below [#reg_save_load Register Save/Load] section for more information.
    243247
    244248||= Value =||= Name =||= Description =||