Changes between Version 22 and Version 23 of sbcrevisions


Ignore:
Timestamp:
10/08/2019 10:41:08 PM (6 months ago)
Author:
Ryan Erbstoesser
Comment:

add dot level revs for newport and oscillator

Legend:

Unmodified
Added
Removed
Modified
  • sbcrevisions

    v22 v23  
    66[=#newport]
    77= Newport Family
     8
     9[=#gw610x]
     10== GW610x
     11
     12=== Revision B
     13Date: 01/10/2018
     14 * Initial release
     15
     16=== Revision B.1
     17Date: 08/02/2019
     18 * Replace GSC crystal and crystal load capacitors to optimize oscillator operation and increase RTC accuracy
     19
     20
     21
     22
     23[=#gw620x]
     24== GW620x
     25
     26=== Revision A.1
     27Date: 09/10/2018
     28 * Initial release
     29
     30=== Revision B
     31Date: 01/10/2018
     32 * Disable USB Battery Charge Revision 1.2 (BC1.2) on Front Panel (USB BC disables USB power if a device does not negotiate within an amount of time which is too long for USB based modems to enumerate)
     33 * Add 4.75K pull up resistors to all OcteonTX digital IO signals
     34 * Fix CAN transceiver by terminating STBY signal to GND (see [wiki:newport/errata#np7 Errata NP7])
     35 * Add build option to bypass the GSC battery LDO
     36 * Add build option for LIS2DE12 3-axis accelerometer (loaded on GW6304)
     37 * Add user pushbutton
     38
     39=== Revision B.1
     40Date: 08/02/2019
     41 * Replace GSC crystal and crystal load capacitors to optimize oscillator operation and increase RTC accuracy
     42
     43
     44[=#gw630x]
     45== GW630x
     46
     47=== Revision B.2
     48Date: 12/15/2017
     49 * Initial release
     50 * Fix GSC BATT current protection (cut/wire)
     51
     52=== Revision B.3
     53Date: 01/04/2018
     54 * Fix voltage strapping for MDIO (cut/wire) (see [wiki:newport/errata#np1 Errata NP1])
     55 * Load resistors for PHY_RST# capability (see [wiki:newport/errata#np1 Errata NP1])
     56
     57=== Revision C
     58Date: 01/04/2018
     59 * Replace 0.22uF AC coupling caps on !SerDes lanes with 0.1uF (recommended values for PCIe gen1/gen2)
     60 * Move CPU LEDR from GPIO-13 to GPIO-31 to resolve CPU frequency strapping (850MHz -> 800MHz)
     61 * Move PHY_RST# from GPIO-31 to GPIO-23 and make open-collector
     62 * Fix voltage strapping for MDIO (see [wiki:newport/errata#np1 Errata NP1])
     63 * Fix GSC BATT current protection
     64 * Replace USB3 VBUS filters for improved manufacture-ability
     65 * Add EMI protection on RJ45 LED's
     66 * Added series resistor to miniPCI socket PERST# signals (to allow optional unload)
     67
     68=== Revision D.1
     69Date: 01/13/2018
     70 * Add reverse-polarity protection on Vin (see [wiki:newport/errata#np2 Errata NP2])
     71 * Add external temperature sensor capable of providing CN80XX CPU die temperature (see [wiki:newport/errata#np3 Errata NP3])
     72 * Add CN80XX FUSE blowing capability for chips supporting trusted boot (see [wiki:newport/errata#np4 Errata NP4])
     73 * Use 0.22uF AC coupling caps for all PCIe channels as this is required for PCIe gen3 and backward compatible with gen1/2
     74 * Improve FAN TACH circuit to support both open drain (OD) and driven TACH outputs
     75 * Improve MMC trace routing
     76 * Change boot device from eMMC_SS to the more robust eMMC_LS (which includes an eMMC reset before retry)
     77 * Add CPU Speed adjustment capability using GSC (requires upcoming GSC feature)
     78 * Add build option to allow off-board I2C to be at 5V or 3.3V
     79 * Remove unnecessary SATA mux and replace AC coupling caps on PCIe RX differential pair going to J10 miniPCIe socket with 0ohm resistors. If user is going to be using an mSATA device on this socket they may need to have boards built with 0.1uf coupling caps here per the mSATA specification
     80 * Add build option to allow isolating J11 miniPCIe clock signals to eliminate contention with non-standard cellular modems
     81 * Add support for optional 802.3bt (PoE++)
     82
     83=== Revision E
     84Date: 01/10/2018
     85 * Disable USB Battery Charge Revision 1.2 (BC1.2) on Front Panel (USB BC disables USB power if a device does not negotiate within an amount of time which is too long for USB based modems to enumerate)
     86 * Add 4.75K pull up resistors to all OcteonTX digital IO signals
     87 * Fix CAN transceiver by terminating STBY signal to GND (see [wiki:newport/errata#np7 Errata NP7])
     88 * Add build option to bypass the GSC battery LDO
     89 * Add build option to support Unex V2X miniPCIe form-factor radio
     90 * Add build option for LIS2DE12 3-axis accelerometer (loaded on GW6304)
     91
     92=== Revision E.1
     93Date: 08/02/2019
     94 * Replace GSC crystal and crystal load capacitors to optimize oscillator operation and increase RTC accuracy
     95
     96
    897
    998[=#gw640x]
     
    34123 * Replace heatsink with fansink
    35124
     125=== Revision B.1
     126Date: 08/02/2019
     127 * Replace GSC crystal and crystal load capacitors to optimize oscillator operation and increase RTC accuracy
     128
    36129
    37130=== Revision B.1 (GW6404 only)
     
    39132 * Fix CAN transceiver by terminating STBY signal to GND (see [wiki:newport/errata#np7 Errata NP7])
    40133
    41 
    42 [=#gw630x]
    43 == GW630x
    44 
    45 === Revision B.2
    46 Date: 12/15/2017
    47  * Initial release
    48  * Fix GSC BATT current protection (cut/wire)
    49 
    50 === Revision B.3
    51 Date: 01/04/2018
    52  * Fix voltage strapping for MDIO (cut/wire) (see [wiki:newport/errata#np1 Errata NP1])
    53  * Load resistors for PHY_RST# capability (see [wiki:newport/errata#np1 Errata NP1])
    54 
    55 === Revision C
    56 Date: 01/04/2018
    57  * Replace 0.22uF AC coupling caps on !SerDes lanes with 0.1uF (recommended values for PCIe gen1/gen2)
    58  * Move CPU LEDR from GPIO-13 to GPIO-31 to resolve CPU frequency strapping (850MHz -> 800MHz)
    59  * Move PHY_RST# from GPIO-31 to GPIO-23 and make open-collector
    60  * Fix voltage strapping for MDIO (see [wiki:newport/errata#np1 Errata NP1])
    61  * Fix GSC BATT current protection
    62  * Replace USB3 VBUS filters for improved manufacture-ability
    63  * Add EMI protection on RJ45 LED's
    64  * Added series resistor to miniPCI socket PERST# signals (to allow optional unload)
    65 
    66 === Revision D.1
    67 Date: 01/13/2018
    68  * Add reverse-polarity protection on Vin (see [wiki:newport/errata#np2 Errata NP2])
    69  * Add external temperature sensor capable of providing CN80XX CPU die temperature (see [wiki:newport/errata#np3 Errata NP3])
    70  * Add CN80XX FUSE blowing capability for chips supporting trusted boot (see [wiki:newport/errata#np4 Errata NP4])
    71  * Use 0.22uF AC coupling caps for all PCIe channels as this is required for PCIe gen3 and backward compatible with gen1/2
    72  * Improve FAN TACH circuit to support both open drain (OD) and driven TACH outputs
    73  * Improve MMC trace routing
    74  * Change boot device from eMMC_SS to the more robust eMMC_LS (which includes an eMMC reset before retry)
    75  * Add CPU Speed adjustment capability using GSC (requires upcoming GSC feature)
    76  * Add build option to allow off-board I2C to be at 5V or 3.3V
    77  * Remove unnecessary SATA mux and replace AC coupling caps on PCIe RX differential pair going to J10 miniPCIe socket with 0ohm resistors. If user is going to be using an mSATA device on this socket they may need to have boards built with 0.1uf coupling caps here per the mSATA specification
    78  * Add build option to allow isolating J11 miniPCIe clock signals to eliminate contention with non-standard cellular modems
    79  * Add support for optional 802.3bt (PoE++)
    80 
    81 === Revision E
    82 Date: 01/10/2018
    83  * Disable USB Battery Charge Revision 1.2 (BC1.2) on Front Panel (USB BC disables USB power if a device does not negotiate within an amount of time which is too long for USB based modems to enumerate)
    84  * Add 4.75K pull up resistors to all OcteonTX digital IO signals
    85  * Fix CAN transceiver by terminating STBY signal to GND (see [wiki:newport/errata#np7 Errata NP7])
    86  * Add build option to bypass the GSC battery LDO
    87  * Add build option to support Unex V2X miniPCIe form-factor radio
    88  * Add build option for LIS2DE12 3-axis accelerometer (loaded on GW6304)
    89 
    90 [=#gw620x]
    91 == GW620x
    92 
    93 === Revision A.1
    94 Date: 09/10/2018
    95  * Initial release
    96 
    97 === Revision B
    98 Date: 01/10/2018
    99  * Disable USB Battery Charge Revision 1.2 (BC1.2) on Front Panel (USB BC disables USB power if a device does not negotiate within an amount of time which is too long for USB based modems to enumerate)
    100  * Add 4.75K pull up resistors to all OcteonTX digital IO signals
    101  * Fix CAN transceiver by terminating STBY signal to GND (see [wiki:newport/errata#np7 Errata NP7])
    102  * Add build option to bypass the GSC battery LDO
    103  * Add build option for LIS2DE12 3-axis accelerometer (loaded on GW6304)
    104  * Add user pushbutton
    105 
    106 
    107 [=#gw610x]
    108 == GW610x
    109 
    110 === Revision B
    111 Date: 01/10/2018
    112  * Initial release
    113 
     134=== Revision B.2 (GW6404 only)
     135Date: 04/19/2019
     136 * Remove unused capacitor C21
     137
     138=== Revision B.3 (GW6404 only)
     139Date: 08/02/2019
     140 * Replace GSC crystal and crystal load capacitors to optimize oscillator operation and increase RTC accuracy
    114141
    115142----