wiki:sbcrevisions

Version 1 (modified by trac, 6 months ago) (diff)

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Gateworks Single Board Computers Revisions

This page is to describe the difference between hardware revisions.

Ventana Family

GW51xx

GW520x

Revision A

Date: 10/18/2013

  • Initial Release

Revision A.1

Date: 10/18/2013

  • Replace decoupling capacitors on the clock buffer input with series resistors for improved PCIe clock performance.

Revision B.1

Date: 1/30/2014

  • Add WiFi disable signal to all Mini-PCIe sockets through zero ohm resistors
  • Add optional load JST 1x2x2mm connector under the pushbutton switch
  • Add ability to route USB OTG to miniPCIe socket instead of front-panel via GPIO
  • Replace 2-pin tamper switch connector with 3-pin connector to support CAN Bus, RS485, TTL serial and tamper switch option
  • Add optional CAN Bus transceiver
  • Add optional RS485 transceiver
  • Add optional TTL serial bypass resistors
  • Add option for 3.3V and 5V power to one pin of the digital I/O connector through unloaded configuration resistors

Revision C.1

Date: 3/31/2015

  • Replace obsolete J2 uSD/SIM socket with functionally equivalent socket
  • Replace 3.3V TVS arrays with 2.5V arrays for improved protection
  • Add 3.3V voltage translator to both 2.5V PCISKTx_RSTJ signals for increased voltage margin
  • Remove capacitor on tamper switch input to reduce switch debounce time constant
  • Add Schottky diode to USB_H1_VBUS net to prevent i.MX6 backfeed when board is powered off and active USB cable is plugged in
  • Connect I2C3 bus to the digital I/O connector through unloaded configuration resistors
  • Connect GPS PPS signal to reserved pin on both Mini-PCIe sockets through unloaded configuration resistors
  • Add changes to support SOM application, (a) add CAN bus transceiver bypass resistors, (b) add RS232 transceiver bypass resistors, (c) add connector under uSD/SIM socket to support SD, USB, battery voltage, and reset, (d) add 2-pin power input connector
  • Add "USB" to PCIe socket silkscreen for clarification

Revision C.2

Date: 4/3/2015

  • Add 100 ohm differential PCIe clock termination resistor for improved PCIe clock compliance.

Revision D

Date: 2/18/2016

  • Move watchdog timer from WDOG2_B to WDOG1_B for mainstream Linux support
  • Add 32.768KHz crystal to processor real time clock for increased watchdog timer and Linux time of day accuracy
  • Replace audio codec logic ground connection with two zero ohm configuration resistors for connecting to analog ground by default audio connector J11.5 as an option
  • Add optional GSC analog input to J4.1 connector through divide by two configuration resistors unloading the series resistor for backwards compatibility
  • Add optional 4-pin friction latching connector for micro-B OTG connector
  • Add optional OTG ID pulldown resistor to configure OTG port for host operation when optional 4-pin connector is loaded
  • Reduce PORJ pullup resistor value for faster rise time
  • Add series resistor between battery positive and reverse current diode for UL two level protection
  • Add processor watchdog support by connecting WDOG_B to PMIC PWRON input
  • Add support for UHS-1 MMC cards to run at their full speed capability
  • Reduce PCIe clock jitter to GEN2 levels by replacing clock buffer with clock generator and connecting clock output back to processor PCIe clock input
  • Replace RGMII_TXCLK series resistor with 22.1 ohm device and add second 22.1 series resistor to RGMII_RXCLK to reduce radiated emissions
  • Improve processor core voltage rails by adding on 22uF capacitor to both VDD_ARM and VDD_SOC and widening copper fills
  • Update SIM/uSD socket footprint and move 0.2mm closer to board edge for improved manufacturing
  • Move USB signals away from SIM/uSD mounting tab slot to improve fabrication processes

GW53xx

Revision F

  • Improve 5V Boost Supply for powering CAN, HDMI, and LVDS. (see Resolves Errata HW18
  • Reduce emissions / EMI on RGMII clock signal with 22 ohm series resistor
  • Improve voltage rails with larger traces and capacitors for greater stability when operating in LDO-Bypass mode
  • Improve USB host connector durability

GW54xx

Revision E

Date: 6/28/2016:

  • Add diode to prevent power backfeed when board is powered off and a USB cable is plugged in to a powered host (see Errata HW8)
  • Connect GPS PPS signal to reserved pin 49 of J9 (Top right) and J10 (Bottomr left/center) Mini-PCIe sockets through unloaded configuration resistors as a build option
  • Add 3.3V voltage translator to miniPCIe socket PERST# signals for increased voltage margin
  • Unload capacitor C473 to resolve issue with off-board tamper signal (see Errata HW4)
  • Add 32.768KHz crystal to processor real time clock for increased watchdog timer and Linux time of day accuracy
  • Add ability to bypass CAN transceiver through loadable resistors
  • Add ability to bypass UART2 RS232 transceiver through loadable resistors
  • Improved GPS Antenna short circuit fault monitoring by lowering trip threshold to allow for higher power active antennas
  • Replace audio codec logic ground connection with two zero ohm configuration resistors for connecting to analog ground by default audio connector J28.5 as an option
  • Add 0 to 5V GSC analog input available via 3-byte register at 0x1A to previously unused J27.4 connector
  • Add resistor loading option to provide 3.3V to J16.3
  • Add resistor loading option to provide 5.0V to J16.4
  • Add series resistor between battery positive and reverse current diode for UL two level protection
  • Add processor watchdog support by connecting WDOG2_B to PMIC PWRON input (see Errata HW12)
  • Reduce PCIe clock jitter to GEN2 levels by routing clock generator output back to processor PCIe clock input (see Errata HW14)
  • Add support for UHS-1 MMC cards to run at their full speed capability (see Errata HW16)
  • Add a reset generator to improve signalling during board reset
  • Improve processor core voltage rails by adding on 22uF capacitor to both VDD_ARM and VDD_SOC and widening copper fills for greater stability when operating in LDO-Bypass mode as well as supporting higher frequency processors
  • Reduce emissions / EMI on RGMII clock signal with 22 ohm series resistor
  • Improve USB host connector durability
  • Add SPI support via J32

GW551x

GW552x

Laguna Family

Please contact support

Other SBC Families

Please contact support