Changes between Version 27 and Version 28 of serial


Ignore:
Timestamp:
12/15/2021 11:01:53 PM (9 months ago)
Author:
Tim Harvey
Comment:

added additional venice details

Legend:

Unmodified
Added
Removed
Modified
  • serial

    v27 v28  
    22
    33
    4 = UART Communication =
     4= UART Communication
    55This page gives some tips and tricks regarding serial communication.
    66
     
    1616== Hardware Support
    1717The following product families support UART:
    18  * Newport
     18 * Venice:
     19  - IMX8M UART
     20  - up to 4Mbd relative to a 1.875MHz clock with 7 or 8 bit data, 1 or 2 stop, programable parity
     21  - Note SP33E RS232 transceiver limit is 1Mbd
     22  - drivers/tty/serial/imx.c
     23 * Newport:
    1924  - CN80XX UAA ARM PL011 r1p5 compatible
    2025  - up to 10Mbd (Note SP33E RS232 transceiver limit is 1Mbd)
    2126  - drivers/tty/serial/amba-pl011.c
    22  * Ventana
     27 * Ventana:
    2328  - IMX6 UART
    2429  - up to 5Mbd (Note SP33E RS232 transceiver limit is 1Mbd and MAX3223E transceiver limit is 500Kbd)
     
    2833
    2934[=#mapping]
    30 == Linux serial port devices ==
     35== Linux serial port devices
    3136Serial UARTS will be represented as /dev/tty* devices depending on the CPU architecture.
    3237
     
    114119
    115120[=#baud]
    116 == Baudrates ==
     121== Baudrates
    117122The maximum baudrate supported depends on the product family and sometimes whether or not you are using TTL or RS232 as at times a transceiver may limit the stream to below 250000 (consult the hardware manual). A safe and typical baudrate is 115200.
    118123
    119124
    120125[=#flowcontrol]
    121 == Flow control ==
     126== Flow control
    122127Flow control refers to hardware or software handshaking that can tell a transmitter when its ok to send more data.
    123128
     
    132137
    133138
    134 == Serial Port Types (DCE vs DTE) ==
     139== Serial Port Types (DCE vs DTE)
    135140The Data Communication Equipment (DCE) pin assignments permit direct connection to a standard Data Terminal Equipment (DTE) PC running terminal emulation software. The inputs and outputs are swapped between DCE and DTE. Please pay careful attention to the connector pinout of any UART from the board's hardware user manual, specifically the TX/RX/RTS/CTS pin's direction (input vs output) to ensure proper interconnect with off-board equipment.
    136141
     
    141146
    142147[=#console]
    143 == serial Console ==
     148== serial Console
    144149There are times when one may not care about serial Linux console because the serial port is desired for other uses.
    145150
     
    148153
    149154[=#flowcontrol]
    150 == Hardware Flow Control ==
     155== Hardware Flow Control
    151156A few Gateworks products that provide TTL level and/or RS232 serial can optionally provide hardware flow control via RTS# and CTS# pins. In this configuration. All Gateworks products present serial from the Data Terminal Equipment (DTE) perspective where TX and RTS are outputs, and RX and CTS are inputs with one exception:
    152157 * Ventana UART's are in DCE mode by default however TX is still an output and RX is an input. Therefore Ventana UART's with flow control are pinned out as follows:
     
    157162
    158163
    159 [=#rs323]
    160 == RS232 ==
     164[=#rs322]
     165== RS232
    161166[https://en.wikipedia.org/wiki/RS-232 RS-232] is a standard for serial communication transmission of data. The most important aspects of the spec are:
    162167 * defines electical signal characteristics such as voltage levels, signalling rate, timing and slew-rate of signals
     
    166171
    167172
    168 === Example usage: RS232 connection to a PC ===
     173=== Example usage: RS232 connection to a PC
    169174
    1701751. Connect all hardware / cables
     
    227232
    228233[=#rs485]
    229 == RS485 ==
     234== RS485
    230235Some Gateworks boards have RS485 transceivers connected to host CPU UART's. This often is an optional feature that must be loaded at the factory. Please contact support@gateworks.com via email for more information.
    231236
     
    263268
    264269[=#rs485-termination]
    265 === RS485 Termination ===
     270=== RS485 Termination
    266271As a general rule, termination resistors should be placed at both far ends of the RS485 network. Without termination resistors reflections of fast driver edges can cause data corruption. Termination resistors also reduce electrical noise sensitivity due to lower impedance. The value of each termination resistor should be equal to the cable characteristic impedance (typically 120 ohms for twisted pairs).
    267272
     
    274279
    275280[=#rs485-failsafebias]
    276 === RS485 Failsafe Bias Resistors ===
     281=== RS485 Failsafe Bias Resistors
    277282When inputs are between -200mV and +200mV the receiver output is 'undefined'. There are four common fault conditions that result in this undefined receiver output that can cause erroneous data:
    278283 * All transmitters in a system are not driving
     
    292297
    293298
    294 
    295 [=#laguna-rs485]
    296 === Laguna ===
    297 The GW16067 IO Expansion module for the GW2380/2/3 supports half-duplex, multi-drop RS485:
    298  * CNS3xxx UART2 (/dev/ttyS2)
    299  * MAX3485 transceiver
    300  * TXEN connected to gpio3
    301  * '''optional on-board termination resistor (R5)'''
    302  * '''on-board fail-safe bias resistors (R3/R7) by default are 4.75k pull-up on D+, 4.75k pull-down on D-''' (bus defaults to logic 1 - never idle)
    303 
    304 By 'optional' this means the baseboard design supports this, but it is not loaded on standard product therefore would be a Gateworks Special. Contact sales@gateworks.com if interested to see if a configuration already exists.
    305 
    306 Your software must assert/de-assert gpio3 manually (see [#rs485-example] example code) or the  uart driver would need to be modified to add TIOCSRS485 ioctl support.
     299[=#venice-rs485]
     300=== Venice
     301See #venice below
     302
     303[=#newport-rs485]
     304=== Newport
     305The GW630x / GW640x have 2 CN80XX UART's (UART2/UART3: /dev/ttyAMA2 and /dev/ttyAMA3) going to a [https://www.exar.com/ds/sp335e.pdf SP335E] transceiver which allows selecting a variety of RS232/RS485 configurations:
     306 * 2x RS232 w/o flow control
     307 * 1x RS232 w/ flow control
     308 * 1x RS485 half duplex
     309 * 1x RS485 full duplex
     310
     311RS485 modes feature:
     312 * optional half-duplex, multi-drop RS585:
     313 * CN80XX UART2 (/dev/ttyAMA2)
     314 * optional on-board termination (enabled by gpio16)
     315 * in-chip fail-safe protection to default idle inputs to logic-high (no external bias resistors required)
     316 * TXEN connected to CN80XX gpio12 which it typically Linux gpio476
     317
     318The pl011 Linux driver supporting the CN80XX serial ports (SERIAL_AMBA_PL011 drivers/tty/serial/amba-pl011.c) does not look like it supports RS485 directly. While this support could be added to the serial driver in the future you can alternatively manage the TXEN (gpio476) directly in a user application (asserting TXEN prior to calling write() then using tcdrain() to wait for the UART FIFO to be empty before deasserting TXEN). For RS485 half-duplex using (see example below).
    307319
    308320
    309321[=#ventana-rs485]
    310 === Ventana ===
     322=== Ventana
    311323The GW52xx/GW53xx/GW54xx support optional half-duplex, multi-drop RS485:
    312324 * IMX6 UART1 (/dev/ttymxc0)
     
    333345
    334346
    335 [=#newport-rs485]
    336 === Newport ===
    337 The GW630x / GW640x have 2 CN80XX UART's (UART2/UART3: /dev/ttyAMA2 and /dev/ttyAMA3) going to a [https://www.exar.com/ds/sp335e.pdf SP335E] transceiver which allows selecting a variety of RS232/RS485 configurations:
    338  * 2x RS232 w/o flow control
    339  * 1x RS232 w/ flow control
    340  * 1x RS485 half duplex
    341  * 1x RS485 full duplex
    342 
    343 RS485 modes feature:
    344  * optional half-duplex, multi-drop RS585:
    345  * CN80XX UART2 (/dev/ttyAMA2)
    346  * optional on-board termination (enabled by gpio16)
    347  * in-chip fail-safe protection to default idle inputs to logic-high (no external bias resistors required)
    348  * TXEN connected to CN80XX gpio12 which it typically Linux gpio476
    349 
    350 The pl011 Linux driver supporting the CN80XX serial ports (SERIAL_AMBA_PL011 drivers/tty/serial/amba-pl011.c) does not look like it supports RS485 directly. While this support could be added to the serial driver in the future you can alternatively manage the TXEN (gpio476) directly in a user application (asserting TXEN prior to calling write() then using tcdrain() to wait for the UART FIFO to be empty before deasserting TXEN). For RS485 half-duplex using (see example below).
     347
     348[=#laguna-rs485]
     349=== Laguna
     350The GW16067 IO Expansion module for the GW2380/2/3 supports half-duplex, multi-drop RS485:
     351 * CNS3xxx UART2 (/dev/ttyS2)
     352 * MAX3485 transceiver
     353 * TXEN connected to gpio3
     354 * '''optional on-board termination resistor (R5)'''
     355 * '''on-board fail-safe bias resistors (R3/R7) by default are 4.75k pull-up on D+, 4.75k pull-down on D-''' (bus defaults to logic 1 - never idle)
     356
     357By 'optional' this means the baseboard design supports this, but it is not loaded on standard product therefore would be a Gateworks Special. Contact sales@gateworks.com if interested to see if a configuration already exists.
     358
     359Your software must assert/de-assert gpio3 manually (see [#rs485-example] example code) or the  uart driver would need to be modified to add TIOCSRS485 ioctl support.
    351360
    352361
    353362[=#rs485-example]
    354 === Example Application ===
     363=== Example Application
    355364Here is an example application that uses the TIOCSRS485 ioctl to configure RS485 for drivers that directly control the transmit enable:
    356365{{{#!c
     
    625634
    626635[=#notes]
    627 == Specific Product / Model Notes ==
    628 
    629 === Newport ===
     636== Specific Product / Model Notes
     637
     638
     639[=#venice]
     640=== Venice
     641Most Venice products have a flexible [http://dev.gateworks.com/datasheets/sp335e.pdf MaxLinear SP335E] RS-232/RS-485/RS-422 transceiver which is software configurable. For these boards a device-tree frament is used to configure the kernel appropriately for the mode you desire:
     642 * 2x RS232 TX/RX (default configuration requiring no dt overlay)
     643 * 1x RS232 TX/RX/RTS/CTS (uses rs232-rts dt overlay)
     644 * 1x RS485 (half duplex) (uses rs485 dt overlay)
     645 * 1x RS422 (full duplex) (uses rs422 dt overlay)
     646
     647To use dt overlays you specify the appropriate overlay(s) in the U-Boot {{{fdt_overlays}}} environment variable in the U-Boot bootloader. This instructs U-Boot to load and apply those dt overlay fragments to the board dt before booting Linux. Note that you can have more than one dt overlay specified in the {{{fdt_overlays}}} separated by a space:
     648 * imx8mm-venice-gw730x-0x RS485:
     649{{{#!bash
     650setenv fdt_overlays "$fdt_overlays imx8mm-venice-gw73xx-0x-rs485.dtbo"
     651saveenv
     652}}}
     653 * imx8mm-venice-gw730x-0x RS422:
     654{{{#!bash
     655setenv fdt_overlays "imx8mm-venice-gw73xx-0x-rs422.dtbo"
     656saveenv
     657}}}
     658 * imx8mm-venice-gw730x-0x RS232-CTSRTS flow control:
     659{{{#!bash
     660setenv fdt_overlays "imx8mm-venice-gw73xx-0x-rs232-rts.dtbo"
     661saveenv
     662}}}
     663 * imx8mm-venice-gw730x-0x default 2x RS232 TX/RX:
     664{{{#!bash
     665setenv fdt_overlays
     666saveenv
     667}}}
     668
     669For Venice when configured for RS485 or RS422 you do not need to use the TIOCSRS485 as the dt fragments will enable this on bootup as well as configure the UARTs transmit enable pin.
     670
     671If you wish to enable the SP335E on-board RS485 termination (which is disabled by default) you can set the GPIO manually:
     672 * GW730x/GW720x:
     673  - U-Boot:
     674{{{#!bash
     675u-boot=> gpio status GPIO1_0
     676Bank GPIO1_:
     677GPIO1_0: output: 0 [x] rs485_term.gpio-hog
     678u-boot=> gpio set GPIO1_0
     679gpio: pin GPIO1_0 (gpio 0) value is 1
     680}}}
     681  - Linux (sysfs) (deprecated API)
     682{{{#!bash
     683root@focal-venice:~# grep rs485_term /sys/kernel/debug/gpio
     684 gpio-0   (rs485_term          )
     685root@focal-venice:~# echo 0 > /sys/class/gpio/export
     686root@focal-venice:~# echo out > /sys/class/gpio/gpio0/direction
     687root@focal-venice:~# echo 1 > /sys/class/gpio/gpio0/value
     688}}}
     689  - Linux (gpiolib)
     690{{{#!bash
     691root@focal-venice:~# gpiofind "rs485_term"
     692gpiochip0 0
     693root@focal-venice:~# gpioset --mode=signal --background gpiochip0 0=1
     694}}}
     695   * Note we have to tell {{{gpioset}}} to remaining running until it receives a signal in order to keep the GPIO line from reverting back to its original state when the process exits. If you use the deprecated {{{sysfs}}} API or set it in U-Boot it may be easier
     696
     697
     698[=#newport]
     699=== Newport
    630700Most Newport products have a flexible [http://dev.gateworks.com/datasheets/sp335e.pdf MaxLinear SP335E] RS-232/RS-485/RS-422 transceiver which is software configurable. For these boards the Bootloader {{{hwconfig}}} environment variable can be used to configure the functionality of the serial ports at power-up between dual RS232 without flow control (default), single RS232 with hardware flow control, and RS485 (full/half duplex and optional termination). See [wiki:/newport/bootloader#hwconfig:serialConfiguration Newport bootloader hwconfig] for more details.
    631701
     
    659729If you wish to change the serial console in the BDK or ATF, you will need to modify the source code which will take some digging.
    660730
    661 === Laguna: GW2382 ===
     731
     732[=#laguna]
     733=== Laguna: GW2382
    662734J8 is an expansion header and is by default mapped to /dev/ttyS2.  J2 and J4 are connected to /dev/ttyS0.  The GPS is hooked to /dev/ttyS1.
    663735
    664 === Laguna: Baud Rate ===
     736=== Laguna: Baud Rate
    665737The Laguna Family has the option of 2 clocks for the serial port, 24MHz and 14.7456MHz.
    666738