Changes between Initial Version and Version 1 of catalina/SDP

Timestamp:

11/04/2026 10:17:37 PM (4 hours ago)

Author:

Tim Harvey

Comment:

initial page

catalina/SDP

@@ +1 @@
+[[Outline]]
+
+= IMX Serial Download Protocol (SDP)
+The i.MX95 processor's internal BOOT ROM handles the first boot stage in order to be able to boot from a variety of devices (eMMC, SD / uSDHC, FlexSPI NOR, USB). One of the boot devices, referred to as the 'Serial Downloader Protocol' (SDP) provides an API over USB.
+
+== Catalina SDP hardware support
+NXP's i.MX95 BOOT ROM only supports SDP on one of the two USB interfaces which is specified by a part ordering option. The GW920x and GW940x boards routes the USB1 interface which supports USB3.0 to the onboard USB 3.0 HUB to support USB 3.0 to the FSA modules and routes the USB2 interface which supports USB2.0 to the front panel Type-C connector.
+
+However, due to part availability from NXP the currently produced GW900x SOM's used for the GW920x boards use the i.MX95 variant supports SDP on the the USB1 (USB3.0) interface. Therefore if you need to use SDP on the current Catalina boards you need to have a specially modified board from Gateworks (contact support@gateworks.com)
+
+Additionally the Gateworks Catalina boards are configured by default via resistor strapping to boot from eMMC. If the eMMC has a valid software image on it the BOOT ROM will boot that. To boot from SDP you must either erase the eMMC or disable it.
+
+To erase boot firmware on eMMC (requires a booting board):
+ - via uboot when using emmc boot0 for boot firmware (most common)
+{{{#!bash
+u-boot=> mmc dev 0 1 && mmc erase 0 2000 # erase 4MB of boot0
+switch to partitions #1, OK
+mmc0(part 1) is current device
+MMC erase: dev # 0, block # 0, count 8192 ... 8192 blocks erased: OK
+}}}
+ - via uboot when using emmc boot1 for boot firmware:
+{{{#!bash
+u-boot=> mmc dev 0 2 && mmc erase 0 2000 # erase 4MB of boot1
+switch to partitions #2, OK
+mmc0(part 2) is current device
+MMC erase: dev # 0, block # 0, count 8192 ... 8192 blocks erased: OK
+}}}
+ - via uboot when using emmc user for boot firmware:
+{{{#!bash
+mmc dev 0 0 && mmc erase 40 2000 # erase 4MB at 32KB of user
+switch to partitions #0, OK
+mmc0(part 0) is current device
+MMC erase: dev # 0, block # 64, count 8192 ... 8192 blocks erased: OK
+}}}
+ - via linux when using emmc boot0 for boot firmware (most common):
+{{{#!bash
+# echo 0 > /sys/block/mmcblk0boot0/force_ro
+# dd if=/dev/zero of=/dev/mmcblk0boot0 bs=8192 count=1
+1+0 records in
+1+0 records out
+}}}
+ - via linux when using emmc boot1 for boot firmware:
+{{{#!bash
+# echo 0 > /sys/block/mmcblk0boot1/force_ro
+# dd if=/dev/zero of=/dev/mmcblk0boot1 bs=8192 count=1
+1+0 records in
+1+0 records out
+}}}
+ - via linux when using emmc user for boot firmware:
+{{{#!bash
+# dd if=/dev/zero of=/dev/mmcblk0 bs=1024 seek=32 count=4064 # erase 4MB at 32KB
+1+0 records in
+1+0 records out
+}}}
+
+Alternatively if the firmware on your board is not booting to U-Boot or Linux and thus keeping the BOOT ROM from enumerating SDP on the USB bus you can use metal tweezers to short the unloaded R58 pads on the GW900x SOM at power-on to effectively disable the eMMC by grounding the CMD signal (remove the short as soon as you see the board boot in order to be able to access the eMMC).
+
+== Catalina SDP software support
+Assuming you have the proper hardware support (see above) the latest Catalina boot firmware supports booting over SDP.
+
+== Booting Catalina U-Boot over SDP with uuu
+NXP provides 'uuu' (Universal Update Utility) which is an evolution of the old Freescale MFGtools. This tool is supported on both Linux and Windows hosts.
+
+NXP recommends using UUU version 1.5.243 or higher for the i.MX95.
+
+Linux Install:
+{{{#!bash
+wget https://github.com/NXPmicro/mfgtools/releases/download/uuu_1.5.243/uuu
+chmod +x uuu
+sudo mv uuu /usr/local/bin
+}}}
+
+Once a Catalina board with proper hardware support (see above) has its USB SDP interface connected to a host PC and has a blank/disabled eMMC or is otherwise configured for SDP boot you will see it on the list of supported SDP devices when powered on:
+{{{#!bash
+$ uuu -lsusb # list compatible devices on the USB bus in SDP mode
+uuu (Universal Update Utility) for nxp imx chips -- libuuu_1.5.243-0-g230f1b1
+
+Connected Known USB Devices
+        Path     Chip    Pro     Vid     Pid     BcdVersion      Serial_no
+        ====================================================================
+        1:1372   MX95    SDPS:   0x1FC9 0x015D   0x0002  
+}}}
+
+Once you have verified the device is attempting to boot via SDP you can boot it over SDP using the correct flash.bin for your board's DRAM configuration (from https://dev.gateworks.com/catalina/boot_firmware/). Note that this takes two invocations of uuu:
+ * Phase 1. Sending the flash.bin to the BOOT ROM
+ * Phase 2. Sending the flash.bin to U-Boot SPL to load U-Boot proper (after U-Boot SPL hits 'SDP: handle requests...'
+
+Example:
+ - Linux host:
+{{{#!bash
+$ sudo uuu flash-4GB_1Gbx16_1R.bin # 4GB DRAM
+[sudo] password for tharvey: 
+uuu (Universal Update Utility) for nxp imx chips -- libuuu_1.5.243-0-g230f1b1
+
+Success 1    Failure 0             
+                                    
+                                    
+1:1372-6A56B 2/ 2 [Done                                  ] SDPS: done     
+}}}
+  - Note you can put this in a while loop to handle both phases and/or multiple boots 'while [ 1 ]; do sudo uuu flash-4GB_1Gbx16_1R.bin; done'
+ * Catalina serial console:
+  - Phase 1:
+{{{#!bash
+imx-oei lf-6.18.2-1.0.0-10-g01fe2ff9 mx95catalina (Oct 15 2026 00:56:06)
+imx-oei: LPDDR5 4GB MT62F1G32D2DS-023
+DDR OEI: IMEM + DMEM load in 3317 us
+DDR OEI: TRAINING complete in 2551823 us
+DDR OEI: done, err = 0
+imx-sm automotive-16.0.0_1.3.0-5-g7da12332 (Oct 15 2026 00:56:08)
+
+U-Boot SPL 2026.04-00024-g572caacf6eae (Nov 04 2026 - 18:36:18 +0000)
+GSCv3   : v67 0xf07b RST:VIN Thermal protection:disabled 
+RTC     : 1970-01-01  20:25:11 UTC
+DRAM    : LPDDR5 4GiB
+Trying to boot from USB SDP
+SDP: initialize...
+SDP: handle requests...
+}}}
+  - Phase 2: (invoke the uuu command again with the same flash.bin)
+{{{#!bash
+Downloading file of size 1376256 to 0x90400000... done
+Jumping to header at 0x90400000
+Header Tag is not an IMX image
+Found header at 0x90400000
+NOTICE:  BL31: v2.12.0(release):lf-6.18.2-1.0.0
+NOTICE:  BL31: Built : 00:56:09, Oct 15 2026
+
+
+U-Boot 2026.04-00024-g572caacf6eae (Nov 04 2026 - 18:36:18 +0000)
+
+CPU:   NXP i.MX95 Rev2.0 A55 at 1800 MHz
+DTB     : imx95-catalina-gw92xx-0x
+Model: Gateworks Catalina GW92xx-0x i.MX95 Development Kit
+DRAM:  3.8 GiB
+Model   : GW9201B-S02C
+Serial  : 577802
+MFGDate : 10-08-2026
+Core:  307 devices, 32 uclasses, devicetree: fit
+MMC:   FSL_SDHC: 0, FSL_SDHC: 1
+Loading Environment from MMC... *** Warning - bad CRC, using default environment
+
+Reading from MMC(0)... In:    serial@44380000
+Out:   serial@44380000
+Err:   serial@44380000
+
+BuildInfo:
+  - ELE firmware version 2.0.6-9a9290a
+
+booting from SDP; setting mmcroot to emmc
+switch to partitions #0, OK
+mmc0(part 0) is current device
+MMC Device 2 not found
+Net:   eth0: enetc-0 [PRIME], eth1: enetc-1, eth2: enetc-2
+GSC     : boot watchdog disabled
+Thermal protection:disabled 
+Hit any key to stop autoboot: 0
+u-boot=> 
+}}}
+
+At this point you can continue using U-Boot. If you wish to flash the firmware to the emmc at this point be sure to specify the emmc device and set the MMC boot partition if needed. For example for eMMC boot0:
+{{{#!bash
+setenv dev 0
+setenv bootpart 1
+run update_firmware && mmc partconf $dev 0 $bootpart 0
+}}}