Catalina MIPI

The Catalina SBC family with the i.MX95 processor features a MIPI port that can be used for either a MIPI DSI or CSI, but not both at the same time.

The MIPI header is located on the SOM as J4.

Gateworks uses a Molex 0525591272 12 pin FPC connector.

At this time, Gateworks exposes the interface but no software support has been added. Software typically would require NXP's kernel and BSP and is not typically supported in mainline Linux. Contact Gateworks support for more information.

There are 4 lanes of MIPI-DSI. Each lane is capable of 2.5Gbps. This thus can support 4kp30 or 3840 x 1440p60

Pinout

Pin	Signal	Pin	Signal
1	MIPI 2-	2	MIPI 2+
3	MIPI 1-	4	MIPI 1+
5	MIPI 3-	6	MIPI 3+
7	CLK-	8	CLK+
9	MIPI 0-	10	MIPI 0+
11	Ground	12	5VDC+