| 34 | {{{ |
| 35 | root@OpenWrt:/# cat /sys/kernel/debug/clk/clk_summary |
| 36 | clock enable_cnt prepare_cnt rate accuracy phase |
| 37 | ---------------------------------------------------------------------------------------- |
| 38 | anaclk2 0 0 0 0 0 |
| 39 | lvds2_in 0 0 0 0 0 |
| 40 | anaclk1 0 0 0 0 0 |
| 41 | lvds1_in 0 0 0 0 0 |
| 42 | dummy 3 3 0 0 0 |
| 43 | lvds2_sel 0 0 0 0 0 |
| 44 | lvds2_gate 0 0 0 0 0 |
| 45 | usbphy2_gate 1 1 0 0 0 |
| 46 | usbphy1_gate 1 1 0 0 0 |
| 47 | osc 7 7 24000000 0 0 |
| 48 | cko2_sel 1 1 24000000 0 0 |
| 49 | cko2_podf 1 1 24000000 0 0 |
| 50 | cko2 1 1 24000000 0 0 |
| 51 | cko 1 1 24000000 0 0 |
| 52 | periph_clk2_sel 0 0 24000000 0 0 |
| 53 | periph_clk2 0 0 24000000 0 0 |
| 54 | gpt_3m 1 1 3000000 0 0 |
| 55 | pll7_bypass_src 1 1 24000000 0 0 |
| 56 | pll7 1 1 480000000 0 0 |
| 57 | pll7_bypass 1 1 480000000 0 0 |
| 58 | pll7_usb_host 1 1 480000000 0 0 |
| 59 | usbphy2 1 1 480000000 0 0 |
| 60 | pll6_bypass_src 1 1 24000000 0 0 |
| 61 | pll6 1 1 500000000 0 0 |
| 62 | pll6_bypass 1 1 500000000 0 0 |
| 63 | pll6_enet 3 3 500000000 0 0 |
| 64 | enet_ref 1 1 50000000 0 0 |
| 65 | pcie_ref 1 1 125000000 0 0 |
| 66 | pcie_ref_125m 1 1 125000000 0 0 |
| 67 | sata_ref 1 1 100000000 0 0 |
| 68 | sata_ref_100m 1 1 100000000 0 0 |
| 69 | lvds1_sel 1 1 100000000 0 0 |
| 70 | lvds1_gate 1 1 100000000 0 0 |
| 71 | pll5_bypass_src 0 0 24000000 0 0 |
| 72 | pll5 0 0 288000000 0 0 |
| 73 | pll5_bypass 0 0 288000000 0 0 |
| 74 | pll5_video 0 0 288000000 0 0 |
| 75 | pll5_post_div 0 0 72000000 0 0 |
| 76 | pll5_video_div 0 0 72000000 0 0 |
| 77 | ipu2_di1_pre_sel 0 0 72000000 0 0 |
| 78 | ipu2_di1_pre 0 0 24000000 0 0 |
| 79 | ipu2_di1_sel 0 0 24000000 0 0 |
| 80 | ipu2_di1 0 0 24000000 0 0 |
| 81 | ipu2_di0_pre_sel 0 0 72000000 0 0 |
| 82 | ipu2_di0_pre 0 0 24000000 0 0 |
| 83 | ipu2_di0_sel 0 0 24000000 0 0 |
| 84 | ipu2_di0 0 0 24000000 0 0 |
| 85 | ipu1_di1_pre_sel 0 0 72000000 0 0 |
| 86 | ipu1_di1_pre 0 0 24000000 0 0 |
| 87 | ipu1_di1_sel 0 0 24000000 0 0 |
| 88 | ipu1_di1 0 0 24000000 0 0 |
| 89 | ipu1_di0_pre_sel 0 0 72000000 0 0 |
| 90 | ipu1_di0_pre 0 0 24000000 0 0 |
| 91 | pll4_bypass_src 0 0 24000000 0 0 |
| 92 | pll4 0 0 144000000 0 0 |
| 93 | pll4_bypass 0 0 144000000 0 0 |
| 94 | pll4_audio 0 0 144000000 0 0 |
| 95 | pll4_post_div 0 0 36000000 0 0 |
| 96 | pll4_audio_div 0 0 36000000 0 0 |
| 97 | pll3_bypass_src 1 1 24000000 0 0 |
| 98 | pll3 1 1 480000000 0 0 |
| 99 | pll3_bypass 1 1 480000000 0 0 |
| 100 | pll3_usb_otg 4 5 480000000 0 0 |
| 101 | ldb_di1_sel 0 0 480000000 0 0 |
| 102 | ldb_di1_div_3_5 0 0 137142857 0 0 |
| 103 | ldb_di1_podf 0 0 68571429 0 0 |
| 104 | ldb_di1 0 0 68571429 0 0 |
| 105 | ldb_di0_sel 0 0 480000000 0 0 |
| 106 | ldb_di0_div_3_5 0 0 137142857 0 0 |
| 107 | ldb_di0_podf 0 0 68571429 0 0 |
| 108 | ldb_di0 0 0 68571429 0 0 |
| 109 | ipu1_di0_sel 0 0 68571429 0 0 |
| 110 | ipu1_di0 0 0 68571429 0 0 |
| 111 | asrc_sel 0 0 480000000 0 0 |
| 112 | asrc_pred 0 0 240000000 0 0 |
| 113 | asrc_podf 0 0 30000000 0 0 |
| 114 | asrc 0 0 30000000 0 0 |
| 115 | esai_sel 0 0 480000000 0 0 |
| 116 | esai_pred 0 0 240000000 0 0 |
| 117 | esai_podf 0 0 30000000 0 0 |
| 118 | esai_extal 0 0 30000000 0 0 |
| 119 | periph2_clk2_sel 0 0 480000000 0 0 |
| 120 | periph2_clk2 0 0 480000000 0 0 |
| 121 | pll3_60m 0 1 60000000 0 0 |
| 122 | ecspi_root 0 1 60000000 0 0 |
| 123 | ecspi5 0 0 60000000 0 0 |
| 124 | ecspi4 0 0 60000000 0 0 |
| 125 | ecspi3 0 0 60000000 0 0 |
| 126 | ecspi2 0 2 60000000 0 0 |
| 127 | ecspi1 0 0 60000000 0 0 |
| 128 | can_root 0 0 30000000 0 0 |
| 129 | can2_serial 0 0 30000000 0 0 |
| 130 | can1_serial 0 0 30000000 0 0 |
| 131 | pll3_80m 1 1 80000000 0 0 |
| 132 | uart_serial_podf 1 1 80000000 0 0 |
| 133 | uart_serial 1 2 80000000 0 0 |
| 134 | pll3_120m 0 0 120000000 0 0 |
| 135 | pll3_pfd3_454m 0 0 454736842 0 0 |
| 136 | spdif_sel 0 0 454736842 0 0 |
| 137 | spdif_pred 0 0 227368421 0 0 |
| 138 | spdif_podf 0 0 28421053 0 0 |
| 139 | spdif 0 0 28421053 0 0 |
| 140 | pll3_pfd2_508m 0 0 508235294 0 0 |
| 141 | ssi3_sel 0 0 508235294 0 0 |
| 142 | ssi3_pred 0 0 127058824 0 0 |
| 143 | ssi3_podf 0 0 63529412 0 0 |
| 144 | ssi3 0 0 63529412 0 0 |
| 145 | ssi2_sel 0 0 508235294 0 0 |
| 146 | ssi2_pred 0 0 127058824 0 0 |
| 147 | ssi2_podf 0 0 63529412 0 0 |
| 148 | ssi2 0 0 63529412 0 0 |
| 149 | ssi1_sel 0 0 508235294 0 0 |
| 150 | ssi1_pred 0 0 127058824 0 0 |
| 151 | ssi1_podf 0 0 63529412 0 0 |
| 152 | ssi1 0 0 63529412 0 0 |
| 153 | pll3_pfd1_540m 1 1 540000000 0 0 |
| 154 | video_27m 1 1 27000000 0 0 |
| 155 | mipi_core_cfg 0 0 27000000 0 0 |
| 156 | hdmi_isfr 1 1 27000000 0 0 |
| 157 | pll3_pfd0_720m 0 0 720000000 0 0 |
| 158 | gpu3d_shader_sel 0 0 720000000 0 0 |
| 159 | gpu3d_shader 0 0 720000000 0 0 |
| 160 | usbphy1 1 1 480000000 0 0 |
| 161 | pll2_bypass_src 1 1 24000000 0 0 |
| 162 | pll2 1 1 528000000 0 0 |
| 163 | pll2_bypass 1 1 528000000 0 0 |
| 164 | pll2_bus 2 2 528000000 0 0 |
| 165 | cko1_sel 0 0 528000000 0 0 |
| 166 | cko1_podf 0 0 528000000 0 0 |
| 167 | cko1 0 0 528000000 0 0 |
| 168 | periph2_pre 0 0 528000000 0 0 |
| 169 | periph2 0 0 528000000 0 0 |
| 170 | mmdc_ch1_axi_podf 0 0 528000000 0 0 |
| 171 | mmdc_ch1_axi 0 0 528000000 0 0 |
| 172 | periph_pre 1 1 528000000 0 0 |
| 173 | periph 3 3 528000000 0 0 |
| 174 | ahb 8 8 132000000 0 0 |
| 175 | sdma 12 2 132000000 0 0 |
| 176 | sata 1 1 132000000 0 0 |
| 177 | rom 1 1 132000000 0 0 |
| 178 | ocram 1 1 132000000 0 0 |
| 179 | hdmi_iahb 1 1 132000000 0 0 |
| 180 | esai_mem 0 0 132000000 0 0 |
| 181 | esai_ipg 0 0 132000000 0 0 |
| 182 | caam_aclk 1 1 132000000 0 0 |
| 183 | caam_mem 1 1 132000000 0 0 |
| 184 | asrc_mem 0 0 132000000 0 0 |
| 185 | asrc_ipg 0 0 132000000 0 0 |
| 186 | ipg 6 8 66000000 0 0 |
| 187 | usboh3 2 2 66000000 0 0 |
| 188 | uart_ipg 1 2 66000000 0 0 |
| 189 | ssi3_ipg 0 0 66000000 0 0 |
| 190 | ssi2_ipg 0 1 66000000 0 0 |
| 191 | ssi1_ipg 0 1 66000000 0 0 |
| 192 | spdif_gclk 0 0 66000000 0 0 |
| 193 | spba 0 0 66000000 0 0 |
| 194 | mipi_ipg 0 0 66000000 0 0 |
| 195 | iim 0 0 66000000 0 0 |
| 196 | gpt_ipg 1 1 66000000 0 0 |
| 197 | enet 2 2 66000000 0 0 |
| 198 | can2_ipg 0 0 66000000 0 0 |
| 199 | can1_ipg 0 0 66000000 0 0 |
| 200 | caam_ipg 1 1 66000000 0 0 |
| 201 | ipg_per 1 1 66000000 0 0 |
| 202 | pwm4 1 1 66000000 0 0 |
| 203 | pwm3 0 0 66000000 0 0 |
| 204 | pwm2 0 0 66000000 0 0 |
| 205 | pwm1 0 0 66000000 0 0 |
| 206 | i2c3 0 0 66000000 0 0 |
| 207 | i2c2 0 0 66000000 0 0 |
| 208 | i2c1 0 0 66000000 0 0 |
| 209 | gpt_ipg_per 0 0 66000000 0 0 |
| 210 | mmdc_ch0_axi_podf 1 1 528000000 0 0 |
| 211 | mmdc_ch0_axi 3 3 528000000 0 0 |
| 212 | ipu1_sel 1 1 528000000 0 0 |
| 213 | ipu1_podf 1 1 264000000 0 0 |
| 214 | ipu1 1 1 264000000 0 0 |
| 215 | ipu2_sel 1 1 528000000 0 0 |
| 216 | ipu2_podf 1 1 264000000 0 0 |
| 217 | ipu2 1 1 264000000 0 0 |
| 218 | axi_sel 1 1 528000000 0 0 |
| 219 | axi 2 2 264000000 0 0 |
| 220 | openvg_axi 0 0 264000000 0 0 |
| 221 | mlb 0 0 264000000 0 0 |
| 222 | gpu2d_axi 0 0 264000000 0 0 |
| 223 | gpu3d_axi 0 0 264000000 0 0 |
| 224 | pcie_axi_sel 1 1 264000000 0 0 |
| 225 | pcie_axi 1 1 264000000 0 0 |
| 226 | eim_slow_sel 1 1 264000000 0 0 |
| 227 | eim_slow_podf 1 1 132000000 0 0 |
| 228 | eim_slow 1 1 132000000 0 0 |
| 229 | vdo_axi_sel 0 0 264000000 0 0 |
| 230 | vdo_axi 0 0 264000000 0 0 |
| 231 | vdoa 0 0 264000000 0 0 |
| 232 | vpu_axi_sel 0 0 264000000 0 0 |
| 233 | vpu_axi_podf 0 0 264000000 0 0 |
| 234 | vpu_axi 0 0 264000000 0 0 |
| 235 | pll2_pfd2_396m 1 1 396000000 0 0 |
| 236 | eim_sel 0 0 396000000 0 0 |
| 237 | eim_podf 0 0 198000000 0 0 |
| 238 | enfc_sel 0 0 396000000 0 0 |
| 239 | enfc_pred 0 0 99000000 0 0 |
| 240 | enfc_podf 0 0 99000000 0 0 |
| 241 | enfc 0 0 99000000 0 0 |
| 242 | gpmi_io 0 0 99000000 0 0 |
| 243 | usdhc4_sel 0 0 396000000 0 0 |
| 244 | usdhc4_podf 0 0 198000000 0 0 |
| 245 | usdhc4 0 0 198000000 0 0 |
| 246 | gpmi_bch 0 0 198000000 0 0 |
| 247 | usdhc3_sel 1 1 396000000 0 0 |
| 248 | usdhc3_podf 1 1 198000000 0 0 |
| 249 | usdhc3 4 4 198000000 0 0 |
| 250 | apbh_dma 1 1 198000000 0 0 |
| 251 | per1_bch 0 0 198000000 0 0 |
| 252 | gpmi_bch_apb 0 0 198000000 0 0 |
| 253 | gpmi_apb 0 0 198000000 0 0 |
| 254 | usdhc2_sel 0 0 396000000 0 0 |
| 255 | usdhc2_podf 0 0 198000000 0 0 |
| 256 | usdhc2 0 0 198000000 0 0 |
| 257 | usdhc1_sel 0 0 396000000 0 0 |
| 258 | usdhc1_podf 0 0 198000000 0 0 |
| 259 | usdhc1 0 0 198000000 0 0 |
| 260 | hsi_tx_sel 0 0 396000000 0 0 |
| 261 | hsi_tx_podf 0 0 198000000 0 0 |
| 262 | hsi_tx 0 0 198000000 0 0 |
| 263 | step 0 0 396000000 0 0 |
| 264 | pll2_198m 0 0 198000000 0 0 |
| 265 | pll2_pfd1_594m 0 0 594000000 0 0 |
| 266 | gpu3d_core_sel 0 0 594000000 0 0 |
| 267 | gpu3d_core_podf 0 0 594000000 0 0 |
| 268 | gpu3d_core 0 0 594000000 0 0 |
| 269 | pll2_pfd0_352m 0 0 352000000 0 0 |
| 270 | gpu2d_core_sel 0 0 352000000 0 0 |
| 271 | gpu2d_core_podf 0 0 352000000 0 0 |
| 272 | gpu2d_core 0 0 352000000 0 0 |
| 273 | pll1_bypass_src 1 1 24000000 0 0 |
| 274 | pll1 1 1 996000000 0 0 |
| 275 | pll1_bypass 1 1 996000000 0 0 |
| 276 | pll1_sys 1 1 996000000 0 0 |
| 277 | pll1_sw 1 1 996000000 0 0 |
| 278 | arm 2 2 996000000 0 0 |
| 279 | twd 1 1 498000000 0 0 |
| 280 | ckih1 0 0 0 0 0 |
| 281 | ckil 0 0 32768 0 0 |
| 282 | root@OpenWrt:/# |
| 283 | |
| 284 | }}} |
| 285 | |