| | 1 | [[PageOutline]] |
| | 2 | |
| | 3 | = Gateworks JTAG support = |
| | 4 | |
| | 5 | '''To use the JTAG software with the Ventana boards, please see the [wiki:jtag_instructions JTAG Software Page]''' |
| | 6 | |
| | 7 | == GW16042 JTAG dongle == |
| | 8 | The GW16042 JTAG dongle uses an FTDI FT2232D which has 2 fairly general purpose 8-bit ports. The 1st port we use for JTAG utilizing the FTDI MPSSE engine . The 2nd port we use for Serial Console. |
| | 9 | |
| | 10 | == Gateworks System Controller (GSC) == |
| | 11 | |
| | 12 | Most of our boards have a 'Gateworks System Controller' implemented with an MSP430 MPU which emulates several I2C devices used for system control and monitoring (see [wiki:gsc]). The MSP430 is on our JTAG chain, along with the board specific CPU so that we can access both of these devices via JTAG. The MSP430 does not use standard JTAG and by default and the part comes up in 'Spy-By-Wire' mode where you must transition TRST and SRST properly to get the part into JTAG mode. Without doing so, it will 'break the chain'. Additionally, the MSP430 must be manually clocked when accessing its JTAG interface which the TDI signal is used for. For these reasons the MSP430 must be the first device on the JTAG chain. On all Gateworks boards with a GSC a bypass resistor exists across the TDI and TDO pins of the GSC so that it can be optionally loaded with a 0ohm resistor to physically bypass the GSC from the JTAG chain. When this is done you can still access the rest of the chain, just not the GSC. The board will function normally you just wont be able to read/write GSC firmware via the GW16042 JTAG dongle and software. Refer the the individual product user manual for details about the resistor to bypass the GSC from the JTAG chain. |
| | 13 | |
| | 14 | The following state transitions of JTAG TRST# and SRST# will put the MSP430 in JTAG mode: |
| | 15 | 1. JTAG TRST# = 0, JTAG SRST# = 1 |
| | 16 | 2. JTAG TRST# = 1, JTAG SRST# = 1 |
| | 17 | 3. JTAG TRST# = 1, JTAG SRST# = 0 |
| | 18 | 4. JTAG TRST# = 0, JTAG SRST# = 0 |
| | 19 | 5. JTAG TRST# = 1, JTAG SRST# = 0 |
| | 20 | 6. JTAG TRST# = 1, JTAG SRST# = 1 |
| | 21 | |
| | 22 | Once in JTAG mode, it will be in bypass by default with an 8-bit instruction length. Note that the MSP430 does not have a JTAG ID thus it will not show up if you try to auto detect. |
| | 23 | |
| | 24 | References: |
| | 25 | - Gateworks System Controller: [wiki:gsc] |
| | 26 | - FTDI AN_108 MPSSE - http://www.ftdichip.com/Support/Documents/AppNotes/AN_108_Command_Processor_for_MPSSE_and_MCU_Host_Bus_Emulation_Modes.pdf |
| | 27 | - MSP430 Programming Via the JTAG interface - http://www.ti.com/lit/ug/slau320h/slau320h.pdf |
| | 28 | |
| | 29 | == JTAG Chain == |
| | 30 | The Gateworks Ventana family has the following JTAG chain: |
| | 31 | 1. GSC (MSP430) (IR length=8bits, defaults to Spy-By-Wire mode on powerup) |
| | 32 | 2. IMX6 SoC which internally has the following devices on the JTAG chain: |
| | 33 | a. IMX6 SJC (IR length=5bits) |
| | 34 | b. IMX6 SDMA (IR length=4bits) |
| | 35 | c. ARMV7A DAP (IR length=4bits) |
| | 36 | |
| | 37 | The Gateworks Laguna family has the following JTAG chain: |
| | 38 | 1. GSC (MSP430) (IR length=8bits, defaults to Spy-By-Wire mode on powerup) |
| | 39 | 2. CNS3xxx CPU (IR length=5 bits) |
| | 40 | 3. CNS3xxx CPU (IR length=5 bits) (if dual-core product) |
| | 41 | |
| | 42 | The Gateworks Rincon family has the following JTAG chain: |
| | 43 | 1. GSC (MSP430) (IR length=8bits, defaults to Spy-By-Wire mode on powerup) |
| | 44 | 2. DM6446 CPU (IR length=6 bits) (in bypass mode at powerup) |
| | 45 | 3. ARM9 Core (IR length=4 bits) |
| | 46 | |
| | 47 | The Gateworks Avila / Cambria family has the following JTAG chain: |
| | 48 | 1. GSC (MSP430) (IR length=8bits, defaults to Spy-By-Wire mode on powerup) (only certain avila/cambria products have a GSC) |
| | 49 | 2. IXP42x CPU (IR length=7 bits) |
| | 50 | 3. PLD (IR length=8 bits) (only certain avila/cambria products have a PLD) |
| | 51 | |
| | 52 | == OpenOCD == |
| | 53 | [http://openocd.sourceforge.net/doc/html/index.html OpenOCD] is an on chip debugger which aims to provide in-system programming and debugging. In order to use OpenOCD on our platform, you must install current version of OpenOCD and apply a patch. Listed below are the steps involved. |
| | 54 | |
| | 55 | Note: These steps were performed on Ubuntu 13.04 32-bit and Ubuntu 14.04 64-bit. The following dependencies were installed prior to installing OpenOCD: libtool, git, curl, texinfo, automake |
| | 56 | {{{ |
| | 57 | $ git clone git://git.code.sf.net/p/openocd/code openocd |
| | 58 | $ cd openocd |
| | 59 | $ ./bootstrap |
| | 60 | $ ./configure --enable-ftdi --enable-maintainer-mode |
| | 61 | $ wget http://trac.gateworks.com/raw-attachment/wiki/jtag/gw16042.cfg |
| | 62 | $ wget http://trac.gateworks.com/raw-attachment/wiki/jtag/gateworks-openocd.patch |
| | 63 | $ git apply gateworks-openocd.patch |
| | 64 | $ make |
| | 65 | }}} |
| | 66 | |
| | 67 | We currently have a board configuration file for the gw2388 and our Ventana family line. You can grab either one by doing the following: |
| | 68 | {{{ |
| | 69 | wget http://trac.gateworks.com/raw-attachment/wiki/jtag/gw2388.cfg |
| | 70 | wget http://trac.gateworks.com/raw-attachment/wiki/jtag/gw5xxx.cfg |
| | 71 | }}} |
| | 72 | |
| | 73 | To run OpenOCD on the gw2388, just enter the following: |
| | 74 | {{{ |
| | 75 | ./src/openocd -f gw16042.cfg -f gw2388.cfg |
| | 76 | }}} |
| | 77 | |
| | 78 | To run OpenOCD on our Ventana family line, do the following (Assuming you are in the build directory for OpenOCD): |
| | 79 | {{{ |
| | 80 | ./src/openocd -f gw16042.cfg -f tcl/target/imx6.cfg -f gw5xxx.cfg |
| | 81 | }}} |
| | 82 | |
| | 83 | Expect to see retries as the MSP430 takes a few tries to get into 4-wire JTAG mode. After that, just follow the [http://openocd.sourceforge.net/doc/pdf/openocd.pdf openocd user manual]. |
