| 461 | ==== Venice GW7100 Example |
| 462 | |
| 463 | The below example examines pinmuxing the SPI pins on the GW7100 peripheral header to be a UART. |
| 464 | |
| 465 | To understand pinmuxing the quickest way is to start with the SoC's pinfunc header (https://elixir.bootlin.com/linux/v6.11.1/source/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h) and search for either the function you are looking for (ie _UART4_DCE_TX) or the pin's you are interested in exploring muxing options with (ie IOMUXC_ECSPI2_MOSI). You have to work your way back from the baseboard, to the SOM and then to the 'pad' on the IMX8M Mini. Note that there are differences between the imx8mm and imx8mp also. |
| 466 | |
| 467 | So if one wanted to use a gw71xx and make spi2 uart4 (2-wire UART, no flow control) they could do the following dt fragment at the bottom of their device-tree (ie can modify imx8mm-venice-gw71xx-0x.dts): |
| 468 | {{{ |
| 469 | &ecspi2 { |
| 470 | status = "disabled"; |
| 471 | }; |
| 472 | |
| 473 | &uart4 { |
| 474 | pinctrl-names = "default"; |
| 475 | pinctrl-0 = <&pinctrl_uart4>; |
| 476 | status = "okay"; |
| 477 | }; |
| 478 | |
| 479 | &iomuxc { |
| 480 | pinctrl_uart4: uart4grp { |
| 481 | fsl,pins = < |
| 482 | MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x140 |
| 483 | MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x140 |
| 484 | >; |
| 485 | }; |
| 486 | }}} |
| 487 | |
| 488 | Note of course one would have to give up some hardware features: |
| 489 | - Make sure U13 TPM is unloaded |
| 490 | - Likely want to unload R80, R79 |
| 491 | |
| 492 | |
| 493 | |