Changes between Version 3 and Version 4 of multicoreprocessing
- Timestamp:
- 02/27/2023 09:03:59 PM (20 months ago)
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multicoreprocessing
v3 v4 48 48 The 'affinity' of an interrupt handler can be get/set via /proc/irq/<interrupt>/smp_affinity which is a bitmask of what CPU cores the interrupt handler can run on. By default the affinity for each handler is set to allow all available cores (ie for a dual-core system a value of 3 means bit0 (CPU0) and bit1 (CPU1) are both set). If you want a particular interrupt handler to always occur on a specific CPU you can change that bitmask. To see what interrupt handlers are configured and what interrupt they are on look at /proc/interrupts. 49 49 50 For example to set the MMC interrupt handler on a dual-core Laguna (cns3xxx) board to only run on CPU1 (and never CPU0):51 {{{52 cat /proc/interrupts ;# see interrupt mapping53 echo 2 > /proc/irq/33/smp_affinity ;# set MMC irq to CPU154 }}}55 50 56 51 References '''PLEASE UTILIZE''': … … 112 107 Depending on your interrupt routing (board stackup), device slot placement (what device is in what slot), and CPU (number of cores) you can then choose to spread interrupts according to your application needs. 113 108 114 ==== Laguna ====115 The cns3xxx uses irq61 for pcie0_intr which in the case of a PCIe-to-PCI bridge ends up combining INTA/B/C/D on a single ARM CPU interrupt. This is not optimal when you have multiple cores. To overcome this limitation an enhancement was made on the GW2388-4-H (the model of your GW2388 is displayed by the bootloader on bootup) by additionally routing the INTA/B/C/D signals to unique external ARM CPU interrupts:116 * J5: irq95117 * J7: irq94118 * J4: irq93119 * J6: irq154120 121 To determine if you have a Laguna board supporting isolated PCI interrupts, check the PCB part number and revision under the 6digit bar-code label on the top of the board:122 * GW2388-4 RevH will have PCB 02210082-07. The 07 indicates the PCB revision and anything above rev 07 supports isolated interrupts123 124 A linux kernel patch is necessary to detect boards that support the isolated PCI interrupts and configure them to be used for the PCI host controller's interrupts. This is supported in:125 * OpenWrt trunk BSP r553126 * OpenWrt 13.06 BSP branch r554127 109 128 110 == Specifying and determining CPU for a userspace process == … … 188 170 = Single Core Processing = 189 171 190 There may be times when a developer needs to only use one CPU because of driver issues, etc. We have found in many instances, especially with wireless application, that they are interrupt intensive and thus the CPU will be running at very low utilization but the interrupt controller is saturated. Since the wireless drivers can only operate on a single core any reduction in overall interrupt traffic helps with performance. When in dual core mode, we use FIQs for inter-processor communication so by running in single core mode we actually reduce the load on the interrupt controller which we’ve seen in some cases provide 5-10% performance improvement. If you are running a lot of user applications then the dual core can definitely provide a benefit it really just depends on your application. '''NOTE: This mainly applies to the Laguna Family line of ARM11 processors. Newer processors have better interrupt capabilities'''172 There may be times when a developer needs to only use one CPU because of driver issues, etc. We have found in many instances, especially with wireless application, that they are interrupt intensive and thus the CPU will be running at very low utilization but the interrupt controller is saturated. Since the wireless drivers can only operate on a single core any reduction in overall interrupt traffic helps with performance. 191 173 192 174 To do this, we will modify the bootargs in the bootloader. … … 251 233 [[Image(cpu0.png)]] 252 234 253 == Single Core Power Consumption (Laguna Family Only)==254 Some quick measurements on a GW2388 with VIN=10V:255 * At the prompt, the current difference was only 2ma (396mA single vs 398mA dual )256 * Under stress the current difference was fairly small, 44mA (438 single core vs 482 mA dual core)257