| 15 | |
| 16 | === Revision B |
| 17 | Date: 11/29/2018 |
| 18 | * Replace 0.22uF AC coupling caps on !SerDes lanes with 0.1uF (recommended values for PCIe gen1/gen2) |
| 19 | * Change boot device from eMMC_SS to the more robust eMMC_LS (which includes an eMMC reset before retry) |
| 20 | * Add CN80XX FUSE blowing capability for chips supporting trusted boot (see [wiki:newport/errata#np4 Errata NP4]) |
| 21 | * Add external temperature sensor capable of providing CN80XX CPU die temperature (see [wiki:newport/errata#np3 Errata NP3]) |
| 22 | * Add CPU Speed adjustment capability using GSC (requires upcoming GSC feature) |
| 23 | * Add build option to allow off-board I2C to be at 5V or 3.3V |
| 24 | * Remove unnecessary SATA mux and replace AC coupling caps on PCIe RX differential pair going to J10 miniPCIe socket with 0ohm resistors. If user is going to be using an mSATA device on this socket they may need to have boards built with 0.1uf coupling caps here per the mSATA specification |
| 25 | * Add build option to allow bypass of serial port transceiver |
| 26 | * Fix CAN transceiver OSC input |
| 27 | * Fix QSGMII SPD/ACT LEDs |
| 28 | * Add reverse-polarity protection on Vin (see [wiki:newport/errata#np2 Errata NP2]) |
| 29 | * Add buid option to allow bypass of PoE circuit |
| 30 | * Improve FAN TACH circuit to support both open drain (OD) and driven TACH outputs |
| 31 | * Add support for optional 802.3bt (PoE++) |
| 32 | * Improve processor core voltage rail by widening copper fills |
| 33 | * Increase output voltage of GSC input LDO from 3.32V to 3.5V to avoid draining surface charge from newly installed battery |
| 34 | * Replace heatsink with fansink |
| 35 | |
| 36 | |
| 37 | === Revision B.1 (GW6304 only) |
| 38 | Date: 11/29/2018 |
| 39 | * Fix CAN transceiver by terminating STBY signal to GND |
| 40 | |
50 | | * Add build option to allow off-board I2C to be at 5V or 3.3V - contact sales@gateworks.com for details |
51 | | * Remove unnecessary SATA mux and replace AC coupling caps on PCIe RX differential pair going to J10 miniPCIe socket with 0ohm resistors. If user is going to be using an mSATA device on this socket they may need to have boards built with 0.1uf coupling caps here per the mSATA specification - contact sales@gateworks.com for details - contact sales@gateworks.com for details |
52 | | * Add build option to allow isolating J11 miniPCIe clock signals to eliminate contention with non-standard cellular modems - contact sales@gateworks.com for details |
53 | | * Add support for optional 802.3bt (PoE++) - contact sales@gateworks.com for details |
| 76 | * Add build option to allow off-board I2C to be at 5V or 3.3V |
| 77 | * Remove unnecessary SATA mux and replace AC coupling caps on PCIe RX differential pair going to J10 miniPCIe socket with 0ohm resistors. If user is going to be using an mSATA device on this socket they may need to have boards built with 0.1uf coupling caps here per the mSATA specification |
| 78 | * Add build option to allow isolating J11 miniPCIe clock signals to eliminate contention with non-standard cellular modems |
| 79 | * Add support for optional 802.3bt (PoE++) |