Changes between Version 26 and Version 27 of venice/secure_boot


Ignore:
Timestamp:
04/03/2024 09:55:01 PM (8 months ago)
Author:
Samuel Lee
Comment:

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  • venice/secure_boot

    v26 v27  
    15321532 - CONFIG_IMX_HAB=y #'hab_auto_img', 'hab_status' and 'hab_version' commands
    15331533 - CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
     1534* '''''OP-TEE CONFIG OPTIONS'''''
     1535 - CONFIG_IMX_HAB=y
     1536 - CONFIG_CMD_DEKBLOB=y
     1537 - CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
     1538 - CONFIG_OPTEE=y
     1539 - CONFIG_OPTEE_LOAD_ADDRESS= the (link/load) address for TEE that should match BL32_BASE for ATF and CFG_TZDRAM_START for OPTEEld ATF (bl31.bin) with OP-TEE support:
     1540 * build ATF (bl31.bin) with OP-TEE support:
     1541  - Add 'SPD=opteed' to the env to use a Secure Payload Dispatcher (SPD)
     1542  - Add 'BL32_BASE=' to the env to tell the ATF (BL31) where TEE is in memory (BL32)
     1543 * build TEE (tee.bin):
     1544  - PLATFORM=imx
     1545  - PLATFORM_FLAVOR=mx8mmevk|mx8mnevk|mv8mpevk - Use one of these depending on which SOC (imx8mm/imx8mn/imx8mp) you are using. These define CFG_UART_BASE and some memory config which we will override to suit our needs
     1546  - CFG_DDR_SIZE= - Specify the DRAM size of the board you are building for. For example 1GiB=0x40000000, 2GiB=0x80000000, 4GiB=0x10000000
     1547  - CFG_CORE_LARGE_PHYS_ADDR= - n for 3GiB or less DRAM, and y for larger than 3GiB DRAM
     1548  - CFG_CORE_ARM64_PA_BITS= - 32 for 3GiB or less DRAM, and 36 for larger than 3GiB DRAM
     1549  - CFG_TZDRAM_START= - the (link/load) address where TEE should run at
    15341550* '''''SIGNED FIT IMAGE CONFIG OPTIONS'''''
    15351551 - CONFIG_FIT_SIGNATURE=y #enable signature verification of FIT uImages using a hash signed and verified using RSA.