Changes between Version 8 and Version 9 of watchdog


Ignore:
Timestamp:
02/27/2023 08:50:55 PM (15 months ago)
Author:
Tim Harvey
Comment:

removed Laguna info (EOL)

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  • watchdog

    v8 v9  
    4848Due to some IMX6 chip errata resulting in occasional boot failures when booting from NAND flash (which is used as the primary boot device on all Ventana boards) a GSC 'boot' watchdog is used in a special mode to protect against boot failures. In this mode, the GSC 'boot' watchdog is disabled in the bootloader before launching the OS. If the GSC watchdog is enabled (not to be confused with the GSC 'boot' watchdog which can not be disabled) then the watchdog remains enabled from power-up and must be handled by software in the OS to avoid tripping.
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    51 === Laguna (cns3xxx) CPU watchdog
    52 The cns3xxx SoC has a 32bit count-down timer watchdog provided by the ARM11-MPCORE will issue a chip-level reset. An output from the cns3xxx is also used to reset other board peripherals such as the NOR FLASH.
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    54 The linux kernel driver ({{{drivers/watchdog/mpcore_wdt.c}}}) defaults to 60 seconds and allows a timeout period between 0 and 65536 seconds.
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