Changes between Version 22 and Version 23 of SPI


Ignore:
Timestamp:
06/30/2026 04:22:14 PM (14 hours ago)
Author:
Ryan Erb
Comment:

cleanup page, remove newport and ventana, use archive history to see that info

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  • SPI

    v22 v23  
    8080
    8181
    82 === Newport
    83 Gateworks Newport boards support 3.3V TTL SPI up to 50MHz clock to an off-board expansion connector with the following pinout:
    84  * 1 - MOSI
    85  * 2 - MISO
    86  * 3 - SCLK (Up to 50MHz clock supported)
    87  * 4 - SS0# (This is chip select 0)
    88  * 5 - 3.3V
    89  * GND
    9082
    91 Notes:
    92  1. While only a single Chip Select (CS) is brought out to an external connector and of the DIO pins routed to ARM GPIO's can be used as additional chip-selects (contact support@gateworks.com for details)
    93  2. Note that the Cavium ThunderX SPI controller in the CN80XX on the Newport Product family only supports half-duplex SPI transfers. Drivers that use full-duplex transactions can be modified to support half-duplex (see [https://github.com/Gateworks/linux-newport/commit/cb270339619ccf2b50dfd3604a03626f85830453 'can:mcp251x: convert driver to half-duplex SPI'] as en example.
    94  3. Note that the Cavium ThunderX SPI controller in the CN80XX only supports SPI mode 1 (which clock polarity (CPOL/CKP) is low, clock phase (CPHA) is high, and Clock edge (CKE/NCPHA) is low.
    95 
    96 
    97 You need to add a device-tree node to the SPI controller to use a kernel driver. Note that you can also access SPI from userspace using {{{spidev}}} (see [#spidev below])
    98 
    99 An example device-tree child node for a Spansion m25p128 compatible device (S25FL128) 128Mbit (16MB) SPI NOR FLASH device would be:
    100 {{{#!c
    101 &spi_7_0 {
    102        flash: m25p80@0 {
    103                compatible = "spansion,m25p128", "jedec,spi-nor";
    104                spi-max-frequency = <30000000>;
    105                reg = <0>;
    106                #address-cells = <1>;
    107                #size-cells = <1>;
    108                m25p,fast-read;
    109 
    110                partition@0 {
    111                        label = "data";
    112                        reg = <0x0 0x1000000>;
    113                };
    114        };
    115 };
    116 }}}
    117  - Note that this node must appear within the SPI host controller node (&spi_7_0) along with any other devices on the SPI bus.
    118  - Note that the values shown in the above node are specific to the m25p128, and can vary greatly from the actual device you are using. Replace attribute values as necessary.
    119  - When searching for your device ID string or its controlling driver, searching via a Linux LXR site like the one at [https://lxr.missinglinkelectronics.com/linux missing link electronics] for your device name can be helpful.
    120 
    121 
    122 === Ventana
    123 Gateworks Ventana boards support 3.3V TTL SPI to an off-board expansion connector with the following pinout:
    124  * 1 - MOSI
    125  * 2 - MISO
    126  * 3 - SCLK
    127  * 4 - SS0# (This is chip select 0)
    128  * 5 - 3.3V
    129  * GND
    130 
    131 Notes:
    132  1. While only a single Chip Select (CS) is brought out to an external connector and of the DIO pins routed to ARM GPIO's can be used as additional chip-selects. For Ventana this is done via device-tree pinctrl.
    133 
    134 You need to add add a device-tree node to the SPI controller to use a kernel driver. Note that you can also access SPI from userspace using {{{spidev}}} (see [#spidev below])
    135 
    136 An example device-tree child node for a Spansion m25p128 compatible device (S25FL128) 128Mbit (16MB) SPI NOR FLASH device would be:
    137 {{{#!c
    138 &ecspi2 {
    139        flash: m25p80@0 {
    140                compatible = "spansion,m25p128", "jedec,spi-nor";
    141                spi-max-frequency = <30000000>;
    142                reg = <0>;
    143                #address-cells = <1>;
    144                #size-cells = <1>;
    145                m25p,fast-read;
    146 
    147                partition@0 {
    148                        label = "data";
    149                        reg = <0x0 0x1000000>;
    150                };
    151        };
    152 };
    153 }}}
    154  - Note that this node must appear within the SPI host controller. For a list of device-tree nodes [#spitable see above].
    155  - Note that the values shown in the above node are specific to the m25p128, and can vary greatly from the actual device you are using. Replace attribute values as necessary.
    156  - When searching for your device ID string or its controlling driver, searching via a Linux LXR site like the one at [https://lxr.missinglinkelectronics.com/linux missing link electronics] for your device name can be helpful.
    15783
    15884
     
    179105
    180106Examples:
    181  * Venice:
    182   - GW71xx (imx8mm-venice-gw71xx.dtsi), GW72xx (imx8mm-venice-gw72xx.dtsi), and GW73xx (imx8mm-venice-gw73xx.dtsi) all provide ecspi2 to an off-board connector with GPIO5_IO13 as a chip select:
     107 * Venice / VeniceFLEX:
     108  - GW71xx (imx8mm-venice-gw71xx.dtsi), GW72xx (imx8mm-venice-gw72xx.dtsi), GW73xx (imx8mm-venice-gw73xx.dtsi), and GW82xx all provide ecspi2 to an off-board connector with GPIO5_IO13 as a chip select:
    183109{{{#!c
    184110/* off-board header */
     
    200126};
    201127}}}
    202  * Newport:
    203   - GW620x/GW630x/GW640x which has a single SPI controller with 2 chip selects, with CS0 going to an off-board connector and CS1 used for a CAN controller (loaded on GW6204/GW6304/GW6404 boards). Change dts/gw620x-linux.dtsi, dts/gw630x-linux.dtsi dts/gw640x-linux.dtsi to:
    204 {{{#!c
    205 &spi_7_0 {
    206         /*
    207          * SPI_CS0 goes to the off-board connector
    208          * compatible must match a string from drivers/spi/spidev.c's compatible list
    209          */
    210         spidev0: spidev0@0 {
    211                 compatible = "rohm,dh2228fv";
    212                 reg = <0>;
    213                 spi-max-frequency = <10000000>;
    214         };
    215128
    216         /*
    217          * SPI_CS1 goes to the Microchip MCP2515 CAN controller (GW6204/GW6304/GW6404)
    218          */
    219         can0: can@1 {
    220                 compatible = "microchip,mcp2515","linux,spidev";
    221                 reg = <1>;
    222                 clocks = <&can20m>;
    223                 oscillator-frequency = <20000000>;
    224                 interrupt-parent = <&gpio_6_0>;
    225                 interrupts = <5 0x8>; /* IRQ_TYPE_LEVEL_LOW */
    226                 spi-max-frequency = <10000000>;
    227         };
    228 };
    229 }}}
    230   - GW610x which has a single SPI controller with 2 chip selects, with CS0 going to an off-board connector. Change dts/gw610x-linux.dtsi to add the following at the end:
    231 {{{#!c
    232 &spi_7_0 {
    233         /*
    234          * SPI_CS0 goes to the off-board connector
    235          * compatible must match a string from drivers/spi/spidev.c's compatible list
    236          */
    237         spidev0: spidev0@0 {
    238                 compatible = "rohm,dh2228fv";
    239                 reg = <0>;
    240                 spi-max-frequency = <10000000>;
    241         };
    242 };
    243 }}}
    244  * Ventana:
    245   - GW54xx (arch/arm/boot/dts/imx6qdl-gw52xx.dtsi) which brings out the ecspi2 host interface to an off-board connector with GPIO2_IO26 as a chip select:
    246 {{{#!c
    247 &ecspi2 {
    248         cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
    249         pinctrl-names = "default";
    250         pinctrl-0 = <&pinctrl_ecspi2>;
    251         status = "okay";
    252 
    253         spidev0: spidev@0 {
    254                 compatible = "rohm,dh2228fv";
    255                 reg = <0>;
    256                 spi-max-frequency = <60000000>;
    257         };
    258 };
    259 }}}
    260   - GW52xx (arch/arm/boot/dts/imx6qdl-gw53xx.dtsi) which brings out the ecspi3 host interface to an off-board connector with GPIO4_IO24 as a chip select:
    261 {{{#!c
    262 &ecspi3 {
    263         cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
    264         pinctrl-names = "default";
    265         pinctrl-0 = <&pinctrl_ecspi3>;
    266         status = "okay";
    267 
    268         spidev0: spidev@0 {
    269                 compatible = "rohm,dh2228fv";
    270                 reg = <0>;
    271                 spi-max-frequency = <60000000>;
    272         };
    273 };
    274 }}}
    275129
    276130In the above examples, adjust 'spi-max-frequency' according to the max frequency your slave device can support.