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Also see the Gateworks generic PCI wiki page: PCI
Catalina i.MX95 PCIe Support
The i.MX95 SoC has two PCIe Gen 3 single lane host controllers with a TLP size of 256B.
For performance information see here
PCIe Reset
Reset signals are routed to FSA adapters supporting PCIe. The PERST# signal is a GPIO that is specified in the device-tree and automatically controlled by the driver.
Note:
See TracWiki
for help on using the wiki.
