GW16168 NXP Ara240 DNPU AI Accelerator

The GW16168 NXP Ara240 DNPU AI Accelerator is an M.2 2280 M-Key card by Gateworks for use in the Gateworks single board computers. For more product information see here: ​https://www.gateworks.com/products/gw16168-m2-ai-accelerator-usa-made/

Terminology

The following terminology is used in the Kinara documentation:

• Ara1 / Ara2 processor: An ultra low-power programmable Neural Network processor
• Kinara SDK: Kinara Software Development Kit
• DVNC: Kinara Network Compiler
• DVSim: Kinara Simulator
• DVConvert: Kinara Network Converter
• NNApp: Neural Network Application
• Development Platform: Machine to compile model and run simulator
• Target Platform: Platform which Ara1 / Ara2 processor connects to
• PPA: Power, Performance and Accuracy - metrics reported by the compiler
• SOF: Schedule Optimization Factor - a measure reported by the compiler

Documentation and links

Public:

• ​https://github.com/nxp-imx/rt-sdk-ara2 - NXP's repo for ara2 runtime SDK v2.04 with dynamic linked binaries
• ​https://github.com/nxp-imx-support/uiodma-driver - Kernel driver GPL-2.0

NXP Ara240 DNPU AI Accelerator Quick Start

Coming soon!

Troubleshooting

Please note software support should be routed through NXP, who produces the Ara240 DNPU Chip.

​https://community.nxp.com