Changes between Version 29 and Version 30 of expansion/gw16168

Timestamp:

08/25/2026 07:11:11 PM (7 weeks ago)

Author:

Tim Harvey

Comment:

added EEPROM and DRAM size info

expansion/gw16168

@@ -53 +53 @@
  * M2.50: PCIe_PERST#
  * M2.52: P_CLKREQ#
- * M2.56: I2C_SDA 3.3
- * M2.58: I2C_SCL 3.3
+ * M2.56: I2C_SDA 3.3 - M24C64 EEPROM at 0x51, TMP102 at 0x48
+ * M2.58: I2C_SCL 3.3 - M24C64 EEPROM at 0x51, TMP102 at 0x48
 
  * M2.5: PCIE TXN3
@@ -79 +79 @@
  * M2.55: PCIEREFCLKP
 
-
-= Models
+[=#dram_size]
+= DRAM Size
+Gateworks has the following ARA240 modules available:
+ * GW16168 - 16GiB DRAM (suitable for LLM/VLM)
+ * GW16168-SP520 - 8GiB DRAM (suitable for object detection)
+
+The GW16168 models have an I2C EEPROM with board model, serial number and DRAM configuration. The EEPROM is accessed via M.2 pin 58 (I2C_SCL) and pin 56 (I2C_SDA) via 3.3V TTL signalling.
+
+The [https://dev.gateworks.com/catalina/images/catalina-ai.img.gz catalina-ai.img.gz] firmware image contains a script in /usr/share/rt-sdk-ara240/scripts/gw16168_ddr_config.sh which examines the EEPROM in order to specify the proper DDR configuration to the ddr_unified_config application. If you are configuring the DRAM manually use:
+ * GW16168 - 16GiB: use '-m 0 -r 0'
+ * GW16168-SP520 - 8GiB: use '-m 1 -r 1'
+
+As of the ARA2 runtime 2.1.1 release the runtime software has no way to know what DRAM size you have available and will assume 16GiB. If you use the API's to query the DRAM size please be aware of this.
+
+[=#ai-models]
+= AI Models
 Currently NXP has the following models available for Ara240:
 - [https://huggingface.co/nxp/Qwen2.5-7B-Instruct-Ara240 nxp/Qwen2.5-7B-Instruct-Ara240] ~8.17GB - large language model