Changes between Version 56 and Version 57 of gsc

Timestamp:

07/29/2020 04:41:06 AM (4 years ago)

Author:

Bobby Jones

Comment:

Add GSCv3 v57 register descriptions

gsc

@@ -27 +27 @@
  * 0x52 - 24c04 emulated 256 byte EEPROM (common industry standard EEPROM device) (some models only)
  * 0x53 - 24c04 emulated 256 byte EEPROM (common industry standard EEPROM device) (some models only)
+ * 0x5e - Direct memory access read register
  * 0x68 - DS1672 emulated RTC (common industry standard device)
 
@@ -916 +917 @@
 || 15           || GSC_WRITE_PROTECT    || Write Protection                              || All ||
 || 16           || GSC_RESET_CAUSE      || Reset Cause                                   || GSCv3 ||
+|| 17           || GSC_INTERRUPT_SOURCE_1 || Interrupt Source 1                          || GSCv3 ||
+|| 18           || GSC_INTERRUPT_ENABLE_1 || Interrupt Enable 1                          || GSCv3 ||
 || 19           || GSC_THERMAL_PROTECT  || Thermal Protection                            || GSCv3 ||
-
+|| 20           || GSC_CPU_SPEED_CTRL   || CPU Speed Control                             || GSCv3 ||
+|| 21           || GSC_BOOT_OPTIONS     || Boot Control Options                          || GSCv3 ||
+|| 22           || GSC_MEM_ACCESS_PAGE  || Direct Memory Access Page Number              || GSCv3 ||
+|| 23           || GSC_CTRL_2           || Pushbutton Switch, Misc.                      || GSCv3 ||
+|| 31           || GSC_REGISTER_BACKUP  || Thermal Protection                            || GSCv3 ||
 
 [=#gsc_ctrl_0]
@@ -1019 +1026 @@
 || 9  || RST_CAUSE_SOFT_PWR        || Button press from soft power control ||
 
+
+[=#GSC_INTERRUPT_SOURCE_1]
+=== GSC_INTERRUPT_SOURCE_1 (Register R17): Interrupt Source 1
+
+||= Value =||= Name =||= Description =||
+|| 0 || GSP_IRQ_OVRTMP_LOCAL || When set the local temp rose above CRIT_BOARD_TEMP ||
+|| 1 || GSP_IRQ_OVRTMP_REMOTE || When set the remote temp sensor asserted its ALERTJ signal ||
+
+[=#GSC_INTERRUPT_ENABLE_1]
+=== GSC_INTERRUPT_ENABLE_1 (Register R18): Interrupt Enable 1
+
+||= Value =||= Name =||= Description =||
+|| 0 || GSP_IRQ_OVRTMP_LOCAL || Set to enable the local temp rose above CRIT_BOARD_TEMP interrupt ||
+|| 1 || GSP_IRQ_OVRTMP_REMOTE || Set to enable the remote temp sensor asserted ALERTJ signal interrupt ||
+
 [=#gsc_thermal_protect]
 === GSC_THERMAL_PROTECT (Register R19): Thermal Protection Configuration
 Supported on GSCv3 (v53: 20181107 and later firmware), the GSC_THERMAL_PROTECT register configures the thermal protection feature.
 
-||= Bit =||= Name =||= Description                                                                                      =||
+||= Bit =||= Name =||= Description =||
 || 0     || GSC_TP_ENABLE || 1 = Enable Thermal protection ||                                     
 
+[=#GSC_BOOT_OPTIONS]
+=== GSC_BOOT_OPTIONS (Register R21): Boot Control Options
+
+||= Value =||= Name =||= Description =||
+|| 0 || GSC_SWITCH_BOOT_SELECT || Boot device select. Clear for primary, set for alt device. This bit is also controlled by the [#UserPushbutton user pushbutton] 5x press behavior.  ||
+
+[=#GSC_MEM_ACCESS_PAGE]
+=== GSC_MEM_ACCESS_PAGE (Register R22): Direct Memory Access Page Number
+
+||= Value =||= Name =||= Description =||
+|| 0-7 || GSC_PAGE_NUMBER || Page address offset when direct reading the GSC flash ||
+
+This API which is implemented over I2C on address {{{0x5f}}} allows a user to do direct memory reads over the entirety of the accessible memory range ({{{0x0000-0xFFFF}}}). It is used by constructing a 16 bit address with the top byte (a.k.a. page) being set by writing to an undocumented register at address {{{0x20}}} offset {{{0x1f}}}. The bottom byte is then added on via standard I2C protocol. Memory writes are not supported with this API. In order to simplify the usage of this API, a bash script was created that will be posted on the wiki and/or given to FAE's to distribute as they see fit. The name of the script is {{{gsc_direct_mem.sh}}} and the contents are included below. 
+
+ [[CollapsibleStart(GSC Direct Memory Read Script)]]
+{{{#!bash
+#!/bin/bash
+
+[ "$#" -ne 2 ] && {
+        echo "This script acts as a wrapper around I2C commands in order to do direct memory reads of the GSC."
+        echo "It will output the i2c response in an i2cdump type format."
+        echo
+        echo "Usage: $0 <offset> <length>"
+        echo
+        echo "Example usage to read all 2000(0x7d0) peripheral register values:"
+        echo "  $0 0x100 0x7d0"
+        exit 1
+}
+
+# Store inputs
+BUS=0
+ADDR=0x5e
+OFFSET=$1
+LENGTH=$2
+
+# Misc variables
+COUNT=0
+PAGE=0
+PRINTVAL=0x0000
+REMAINDER=0
+HIGH=
+RETURN=
+
+# Calculate initial page number based on passed in offset
+PAGE=$((OFFSET / 0x100))
+OFFSET=$((OFFSET % 0x100))
+
+echo "      0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f     0123456789abcdef"
+while [[ $COUNT -ne $LENGTH ]]; do
+        # Set the page number accordingly
+        i2cset -f -y 0 0x20 0x16 $PAGE
+
+        # Do either a full i2cdump or specify a range if bytes aren't a 0x100 aligned block
+        if [[ $(($LENGTH - $COUNT)) -lt 0x100 || $OFFSET -ne 0 ]]; then
+                HIGH=$(($LENGTH - $COUNT - 1 + $OFFSET))
+                # Record remainder for i2c 0x100 upper range limit
+                if [[ $HIGH -gt 0x100 ]]; then
+                        REMAINDER=$(($HIGH + 1 - 0x100))
+                else
+                        REMAINDER=0
+                fi
+
+                RETURN=$(i2cdump -f -y -r ${OFFSET}-$(($HIGH - $REMAINDER)) 0 $ADDR b | grep ':')
+                COUNT=$(($HIGH - $REMAINDER - $OFFSET + 1 + $COUNT))
+                OFFSET=0
+        else
+                RETURN=$(i2cdump -f -y 0 $ADDR b | grep ':')
+                COUNT=$(($COUNT + 0x100))
+        fi
+
+        if [[ "$RETURN" ]]; then # Only print reads
+                # Format output to be continuous and account for page increase
+                echo "$RETURN" | while read x; do
+                        printf "%04x" "$((0x$(echo $x | cut -d':' -f1) + $((PAGE * 0x100))))"
+                        echo ":${x##*:}"
+                done
+        fi
+
+        # Increase the page count
+        ((++PAGE))
+done
+}}}
+[[CollapsibleEnd]]
+
+[=#GSC_REGISTER_BACKUP]
+=== GSC_REGISTER_BACKUP (Register R31): Register Backup Control
+This register has an upper nibble password of value {{{0xA0}}} that should be bitwise OR'd with an enumerated value in the lower nibble that will be interpreted as the command. This register will self clear when the operation has completed.
+
+||= Value =||= Name =||= Description =||
+|| 1 || GSC_REG_BKP_SAVE || Save current register values to USER backup area ||
+|| 2 || GSC_REG_BKP_USER_LOAD || Load register values from USER backup ||
+|| 3 || GSC_REG_BKP_FACTORY_LOAD || Load register values from FACTORY backup ||
+|| 4-7 || GSC_REG_BKP_PASSWORD || Password for upper nibble ({{{0xA0}}}). Bitwise OR this value with lower nibble enumerated values described above ||
 
 == Code Examples