| 5 | |
| 6 | [=#newport] |
| 7 | = Newport Family = |
| 8 | |
| 9 | [=#gw630x] |
| 10 | == GW630x == |
| 11 | |
| 12 | === Revision B.2 === |
| 13 | Date: 12/15/2017 |
| 14 | * Initial release |
| 15 | * fix GSC BATT current protection (cut/wire) |
| 16 | |
| 17 | === Revision B.3 === |
| 18 | Date: 01/04/2018 |
| 19 | * fix voltage strapping for MDIO (cut/wire) (see [wiki:newport/errata#np1 Errata NP1]) |
| 20 | * load resistors for PHY_RST# capability (see [wiki:newport/errata#np1 Errata NP1]) |
| 21 | |
| 22 | === Revision C === |
| 23 | Date: 01/04/2018 |
| 24 | * replace 0.22uF AC coupling caps on !SerDes lanes with 0.1uF (recommended values for PCIe gen1/gen2) |
| 25 | * move CPU LEDR from GPIO-13 to GPIO-31 to resolve CPU frequency strapping (850MHz -> 800MHz) |
| 26 | * move PHY_RST# from GPIO-31 to GPIO-23 and make open-collector |
| 27 | * fix voltage strapping for MDIO (see [wiki:newport/errata#np1 Errata NP1]) |
| 28 | * fix GSC BATT current protection |
| 29 | * replace USB3 VBUS filters for improved manufacture-ability |
| 30 | * add EMI protection on RJ45 LED's |
| 31 | * added series resistor to miniPCI socket PERST# signals (to allow optional unload) |
| 32 | |
| 33 | ---- |