107 | | || Laguna || GW2380/2/3 || UART0 || ttyS0 || console: 3.3V TTL JTAG J2 / 3.3V TTL J4 || |
108 | | || || || UART1 || ttyS1 || GPS || |
109 | | || || || UART2 || ttyS2 || UART: 3.3V TTL J8 || |
110 | | || || GW2387 || UART0 || ttyS0 || console: 3.3V TTL JTAG J3/J7 / RS232 J13 || |
111 | | || || || UART1 || ttyS1 || RS232 J13 / 3.3V TTL J7 || |
112 | | || || || UART2 || ttyS2 || GPS || |
113 | | || || GW2388 || UART0 || ttyS0 || console: 3.3V TTL JTAG J8 / RS232 J21 || |
114 | | || || || UART1 || ttyS1 || RS232 J21 || |
115 | | || || || UART2 || ttyS2 || GPS || |
116 | | || || GW2391 || UART0 || ttyS0 || console: 3.3V TTL JTAG J1 / RS232 J15 || |
117 | | || || || UART1 || ttyS1 || RS232 J15 || |
118 | | || || || UART2 || ttyS2 || GPS || |
119 | | || || |
625 | | [=#rs485-example] |
626 | | === RS485 without TIOCSRS485 driver support |
627 | | If a board connects RTS, DTR, or a gpio to TX-Enable but does not support the TIOCSRS485 you can alter your code to enable/disable the TX-Enable as needed. |
628 | | |
629 | | Note that if a driver supports TIOCSRS485 (in other words it handles the assertion/de-assertion of TXEN in the driver) this is preferred over using tcdrain() to determine when the FIFO is empty as tcdrain() can have considerable latency at small transmit sizes. |
630 | | |
631 | | Example: |
632 | | {{{#!c |
633 | | /** write_file - write to a file |
634 | | * @param str to write |
635 | | * @param fname to write to |
636 | | * |
637 | | * This is used to set/configure GPIO's via the sysfs interface to gpio class |
638 | | */ |
639 | | int write_file(const char* str, const char* fname) |
640 | | { |
641 | | FILE *file; |
642 | | int ret = -EIO; |
643 | | |
644 | | file = fopen(fname, "w"); |
645 | | if (file) { |
646 | | ret = fprintf(file, "%s\n", str); |
647 | | if (ret <= 0) |
648 | | ret = -EIO; |
649 | | fclose(file); |
650 | | return 0; |
651 | | } |
652 | | return ret; |
653 | | } |
654 | | |
655 | | |
656 | | /** assert_tx - enable/disable TX on a device |
657 | | * @param dev - serial device |
658 | | * @param enable - enable or disable |
659 | | * @returns 0 on success otherwise error |
660 | | */ |
661 | | int assert_tx(int fd, const char *txen, unsigned char enable) |
662 | | { |
663 | | char str[64]; |
664 | | int t; |
665 | | |
666 | | if (!txen) |
667 | | return 0; |
668 | | |
669 | | printf("%sasserting %s\n", (enable)?"":"de-", txen); |
670 | | if (strcasecmp(txen, "DTR") == 0) { |
671 | | // assert DTR on enable, de-assert on disable |
672 | | t = TIOCM_DTR; |
673 | | return ioctl(fd, (enable)?TIOCMBIC:TIOCMBIS, &t); |
674 | | } else if (strcasecmp(txen, "RTS") == 0) { |
675 | | // assert RTS on enable, de-assert on disable |
676 | | t = TIOCM_RTS; |
677 | | return ioctl(fd, (enable)?TIOCMBIC:TIOCMBIS, &t); |
678 | | } else if (strncasecmp(txen, "gpio", 4) == 0) { |
679 | | t = atoi(txen + 4); |
680 | | sprintf(str, "/sys/class/gpio/gpio%d/value", t); |
681 | | write_file((enable)?"1":"0", str); |
682 | | } |
683 | | |
684 | | return 0; |
685 | | } |
686 | | |
687 | | int main(int argc, char **argv) { |
688 | | ... |
689 | | |
690 | | // txen is a string: DTR, RTS, or gpio<n> |
691 | | if (txen && (0 == strncasecmp(txen, "gpio", 4))) |
692 | | { |
693 | | char str[64]; |
694 | | int gpio = atoi(txen + 4); |
695 | | |
696 | | printf("exporting gpio%d\n", gpio); |
697 | | sprintf(str, "%d", gpio); |
698 | | write_file(str, "/sys/class/gpio/export"); |
699 | | sprintf(str, "/sys/class/gpio/gpio%d/direction", gpio); |
700 | | write_file("out", str); |
701 | | sprintf(str, "/sys/class/gpio/gpio%d/value", gpio); |
702 | | write_file("0", str); // assuming TXEN active-high |
703 | | } |
704 | | |
705 | | // transmit data |
706 | | assert_tx(fd, txen, 1); // assert TXEN |
707 | | write(fd, buf, sz); // transmit data |
708 | | tcdrain(fd); //wait for all characters to be transmitted |
709 | | assert_tx(fd, txen, 0); // de-assert TXEN |
710 | | |
711 | | // receive data |
712 | | ... |
713 | | }}} |
714 | | |
812 | | |
813 | | |
814 | | [=#laguna] |
815 | | === Laguna: GW2382 |
816 | | J8 is an expansion header and is by default mapped to /dev/ttyS2. J2 and J4 are connected to /dev/ttyS0. The GPS is hooked to /dev/ttyS1. |
817 | | |
818 | | === Laguna: Baud Rate |
819 | | The Laguna Family has the option of 2 clocks for the serial port, 24MHz and 14.7456MHz. |
820 | | |
821 | | By default the 24MHz clock is loaded. This clock creates drift for some baud rates as seen below. |
822 | | |
823 | | Because this drift is consistent on Laguna boards, Laguna to Laguna serial will work at all baud rates. |
824 | | |
825 | | Therefore, we suggest using rates below 115200. Please contact support at Gateworks if higher baud rates are required. |
826 | | |
827 | | Laguna Buadrates with default 24MHz clock: |
828 | | ||= Target baudrate =||= 24MHz ref div =||= actual baudrate =||= % error =|| |
829 | | || 4800 || 312.50 || 4792 || 0.17 || |
830 | | || 9600 || 156.25 || 9615 || -0.16 || |
831 | | || 19200 || 78.13 || 19231 || -0.16 || |
832 | | || 38400 || 39.06 || 38462 || -0.16 || |
833 | | || 57600 || 26.04 || 57692 || -0.16 || |
834 | | || 115200 || 13.02 || 115385 || -0.16 || |
835 | | || 230400 || 6.51 || 214286 || 6.99 || |
836 | | || 460800 || 3.26 || 500000 || -8.51 || |
837 | | || 921600 || 1.63 || 750000 || 18.62 || |
838 | | || 1500000 || 1.00 || 1500000 || 0 || |