| | 1 | [[PageOutline]] |
| | 2 | |
| | 3 | = Venice Digital IO |
| | 4 | The intent of this page is to provide information about Venice single board computers general purpose off-board digital IO signals. |
| | 5 | |
| | 6 | |
| | 7 | [=#dio] |
| | 8 | = DIO and pin function Mapping |
| | 9 | Venice baseboards provide multiple digital IO signals to a connector. The IMX8MM has 5 GPIO blocks having 32 GPIO's each which typically get mapped to gpio 0 - through gpio 159 in the Linux kernel. Note that this mapping is not guaranteed to stay the same across kernel versions - you can look at the debugfs {{{/sys/kernel/debug/gpio}}} file to see where the IMX8MM GPIO controller is mapped. |
| | 10 | |
| | 11 | The various Venice product hardware manuals contain a table of what pins on the Digital IO connector routes to what IMX8MM GPIO. In some cases these signals can be pinmux'd internally to other functions as indicated in the table. |
| | 12 | |
| | 13 | See the operating manual "Specifications", "Electrical" section for information on DIO max and min driving strength. |
| | 14 | |
| | 15 | Venice DIO Mapping: |
| | 16 | ||= Board =||= Connector =||= Primary Function =||= IMX8MM_PAD =||= GPIO =||= Notes || |
| | 17 | || GW730x/GW720x || J9.1 || DIO0 || GPIO1_IO07 || gpio7 || || |
| | 18 | || || J9.2 || DIO1 || GPIO1_IO09 || gpio9 || can be ENET1_1588_EVENT0_OUT^^^3^^^ || |
| | 19 | || || J9.3 || UART1_RX || GPIO5_IO24 || gpio152 || shared with GPS RX || |
| | 20 | || || J9.4 || UART1_TX || GPIO5_IO23 || gpio151 || shared with GPS TX || |
| | 21 | || || J9.5 || I2C3_SCL || I2C3_SCL || gpio145 (GPIO5_IO17) || shared with MIPI connector || |
| | 22 | || || J9.6 || I2C3_SDA || I2C3_SDA || gpio147 (GPIO5_IO19) || shared with MIPI connector || |
| | 23 | || || J9.7 || GSC_ADC1 || - || - || Can measure 0 to 5V || |
| | 24 | || || J9.8 || GSC_ADC2 || - || - || Can measure 0 to 5V || |
| | 25 | || || J9.9 || VDD_3P3 || - || - || || |
| | 26 | || || J9.10 || GND || - || - || || |
| | 27 | || || |
| | 28 | || GW710x || J25.1 || VDD_5P0 || - || - || || |
| | 29 | || || J25.2 || GND || - || - || || |
| | 30 | || || J25.3 || VDD_5P0 || - || - || || |
| | 31 | || || J25.4 || GND || - || - || || |
| | 32 | || || J25.5 || VDD_3P3 || - || - || || |
| | 33 | || || J25.6 || GND || - || - || || |
| | 34 | || || J25.7 || SPI_MOSI || ECSPI2_MOSI || gpio139 (GPIO5_IO11) || can be UART4_TX^^^3^^^ || |
| | 35 | || || J25.8 || SPI_MISO || ECSPI2_MISO || gpio140 (GPIO5_IO12) || || |
| | 36 | || || J25.9 || SPI_SCLK || ECSPI2_SCLK || gpio138 (GPIO5_IO10) || can be UART4_RX^^^3^^^ || |
| | 37 | || || J25.10 || SPI_SS0 || ECSPI2_SS0 || gpio141 (GPIO5_IO13) || || |
| | 38 | || || J25.11 || I2C3_SCL || I2C3_SCL || gpio146 (GPIO5_IO18) || can be PWM4_OUT^^^1^^^ || |
| | 39 | || || J25.12 || I2C3_SDA || I2C3_SDA || gpio147 (GPIO5_IO19) || can be PWM3_OUT^^^1^^^ || |
| | 40 | || || J25.13 || UART3_RX || UART3_RXD || gpio154 (GPIO5_IO26) || || |
| | 41 | || || J25.14 || UART3_TX || UART3_TXD || gpio155 (GPIO5_IO27) || || |
| | 42 | || || J25.15 || GSC_PB# || - || - || Connect pushbutton to GND || |
| | 43 | || || J25.16 || GSC_ADC1 || - || - || Can measure 0 to 5V || |
| | 44 | || || J25.17 || DIO0 || GPIO1_IO07 || gpio7 || || |
| | 45 | || || J25.18 || DIO1 || GPIO1_IO09 || gpio9 || can be ENET1_1588_EVENT0_OUT^^^3^^^ || |
| | 46 | || || J25.19 || DIO2 || SAI1_RXD1 || gpio99 (GPIO4_IO3) || || |
| | 47 | || || J25.20 || DIO3 || SAI1_RXD2 || gpio100 (GPIO4_IO4) || || |
| | 48 | 1. This is the signal name from the [http://www.gateworks.com/usermanuals Venice hardware manuals] |
| | 49 | 2. This is the connector pinout. |
| | 50 | 3. requires modifying the device-tree to change the pinmux |
| | 51 | |
| | 52 | Note that all signals (unless noted in notes) are 3.3V tolerant. |
| | 53 | |
| | 54 | Note that any GPIO can be used for the following: |
| | 55 | - an additional SPI chip-select for those boards that have a SPI bus connector |
| | 56 | - a 'bit-banged' PWM (using CPU timers) |
| | 57 | - a 'bit-banged' I2C bus (using CPU timers) |
| | 58 | - a 'bit-banged' MDIO bus (using CPU timers) |
| | 59 | |
| | 60 | |
| | 61 | = Useful links |
| | 62 | * [wiki:gpio Linux GPIO and GPIO basics] |
| | 63 | * [wiki:linux/pwm Configuring PWM Hardware] |
| | 64 | * [wiki:I2C Linux I2C] |
