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Venice Digital IO
The intent of this page is to provide information about Venice single board computers general purpose off-board digital IO signals.
DIO and pin function Mapping
Venice baseboards provide multiple digital IO signals to a connector. The IMX8MM has 5 GPIO blocks having 32 GPIO's each which typically get mapped to gpio 0 - through gpio 159 in the Linux kernel. Note that this mapping is not guaranteed to stay the same across kernel versions - you can look at the debugfs /sys/kernel/debug/gpio file to see where the IMX8MM GPIO controller is mapped.
The various Venice product hardware manuals contain a table of what pins on the Digital IO connector routes to what IMX8MM GPIO. In some cases these signals can be pinmux'd internally to other functions as indicated in the table.
See the operating manual "Specifications", "Electrical" section for information on DIO max and min driving strength.
Venice DIO Mapping:
| Board | Connector1 | Primary Function2 | IMX8MM_PAD | U-Boot3 | Linux4 | Notes |
|---|---|---|---|---|---|---|
| GW740x | J14.1 | DIO0 | GPIO1_9 | GPIO1_IO9 | dio0 | |
| J14.2 | DIO1 | GPIO1_11 | GPIO1_IO11 | dio1 | ||
| J14.3 | UART1_RX | input | /dev/ttymxc0 | shared with GPS | ||
| J14.4 | UART1_TX | output | /dev/ttymxc0 | shared with GPS | ||
| J14.5 | I2C4_SCL | output | /dev/i2c-3 | |||
| J14.6 | I2C4_SDA | output | /dev/i2c-3 | |||
| J14.7 | GSC_ADC1 | input | Can measure 0 to 5V | |||
| J14.8 | GSC_ADC2 | input | Can measure 0 to 5V | |||
| J14.9 | VDD_3P3 | |||||
| J14.10 | GND | |||||
| GW730x | J9.1 | DIO0 | GPIO1_IO07 | GPIO1_7 | dio0 | |
| J9.2 | DIO1 | GPIO1_IO09 | GPIO1_9 | dio1 | can be ENET1_1588_EVENT0_OUT5 | |
| J9.3 | UART1_RX | GPIO5_IO24 | GPIO5_24 | managed by UART driver | shared with GPS RX | |
| J9.4 | UART1_TX | GPIO5_IO23 | GPIO5_23 | managed by UART driver | shared with GPS TX | |
| J9.5 / J17.34 | I2C3_SCL | I2C3_SCL | GPIO5_17 | managed by I2C driver | shared with MIPI connector | |
| J9.6 / J17.36 | I2C3_SDA | I2C3_SDA | GPIO5_19 | managed by I2C driver | shared with MIPI connector | |
| J9.7 | GSC_ADC1 | - | vdd_adc1 | vdd_adc1 | Can measure 0 to 5V | |
| J9.8 | GSC_ADC2 | - | vdd_adc2 | vdd_adc2 | Can measure 0 to 5V | |
| J9.9 | VDD_3P3 | - | - | - | ||
| J9.10 | GND | - | - | - | ||
| J17.43 | MIPI_GPIO1 | GPIO4_IO04 | GPIO4_4 | mipi_gpio1 | ||
| J17.45 | MIPI_GPIO2 | GPIO4_IO03 | GPIO4_3 | mipi_gpio2 | ||
| J17.47 | MIPI_GPIO3 | GPIO4_IO01 | GPIO4_1 | mipi_gpio3 | ||
| J17.48 | MIPI_GPIO4 | GPIO1_IO01 | GPIO1_1 | mipi_gpio4 | ||
| J14.22 / J12.22 | PCI_WDIS# | SAI1_RXD5 | GPIO4_7 | pci_wdis# | set in U-Boot / Linux | |
| J14.20 / J12/20 | PCI_RST# | SAI1_RXD4 | GPIO4_6 | managed by PCI driver | ||
| GW720x | J5.1 | DIO0 | GPIO1_IO07 | GPIO1_7 | dio0 | |
| J5.2 | DIO1 | GPIO1_IO09 | GPIO1_9 | dio1 | can be ENET1_1588_EVENT0_OUT5 | |
| J5.3 | UART1_RX | GPIO5_IO24 | GPIO5_24 | managed by UART driver | shared with GPS RX | |
| J5.4 | UART1_TX | GPIO5_IO23 | GPIO5_23 | managed by UART driver | shared with GPS TX | |
| J5.5 / J4.34 | I2C3_SCL | I2C3_SCL | GPIO5_17 | managed by I2C driver | shared with MIPI connector | |
| J5.6 / J4.36 | I2C3_SDA | I2C3_SDA | GPIO5_19 | managed by I2C driver | shared with MIPI connector | |
| J5.7 | GSC_ADC1 | - | vdd_adc1 | vdd_adc1 | Can measure 0 to 5V | |
| J5.8 | GSC_ADC2 | - | vdd_adc2 | vdd_adc2 | Can measure 0 to 5V | |
| J5.9 | VDD_3P3 | - | - | - | ||
| J5.10 | GND | - | - | - | ||
| J4.43 | MIPI_GPIO1 | GPIO4_IO04 | GPIO4_4 | mipi_gpio1 | ||
| J4.45 | MIPI_GPIO2 | GPIO4_IO03 | GPIO4_3 | mipi_gpio2 | ||
| J4.47 | MIPI_GPIO3 | GPIO4_IO01 | GPIO4_1 | mipi_gpio3 | ||
| J4.48 | MIPI_GPIO4 | GPIO1_IO01 | GPIO1_1 | mipi_gpio4 | ||
| J8.22 / J10.22 | PCI_WDIS# | SAI1_RXD5 | GPIO4_7 | pci_wdis# | set in U-Boot / Linux | |
| J8.20 / J10/20 | PCI_RST# | SAI1_RXD4 | GPIO4_6 | managed by PCI driver | ||
| GW710x | J4.1 | VDD_5P0 | - | - | - | |
| J4.2 | GND | - | - | - | ||
| J4.3 | VDD_5P0 | - | - | - | ||
| J4.4 | GND | - | - | - | ||
| J4.5 | VDD_3P3 | - | - | - | ||
| J4.6 | GND | - | - | - | ||
| J4.7 | SPI_MOSI | ECSPI2_MOSI | GPIO5_11 | managed by SPI driver | can be UART4_TX5 | |
| J4.8 | SPI_MISO | ECSPI2_MISO | GPIO5_12 | managed by SPI driver | ||
| J4.9 | SPI_SCLK | ECSPI2_SCLK | GPIO5_10 | managed by SPI driver | can be UART4_RX5 | |
| J4.10 | SPI_SS0 | ECSPI2_SS0 | GPIO5_13 | managed by SPI driver | ||
| J4.11 | I2C3_SCL | I2C3_SCL | GPIO5_18 | managed by I2C driver | can be PWM4_OUT5 | |
| J4.12 | I2C3_SDA | I2C3_SDA | GPIO5_19 | managed by I2C driver | can be PWM3_OUT5 | |
| J4.13 | UART3_RX | UART3_RXD | GPIO5_26 | managed by UART driver | ||
| J4.14 | UART3_TX | UART3_TXD | GPIO5_27 | managed by UART driver | ||
| J4.15 | GSC_PB# | - | - | user_pb | Connect pushbutton to GND | |
| J4.16 | GSC_ADC1 | - | vdd_adc2 | vdd_adc1 | Can measure 0 to 5V | |
| J4.17 | DIO0 | GPIO1_IO07 | GPIO1_7 | dio0 | ||
| J4.18 | DIO1 | GPIO1_IO09 | GPIO1_9 | dio1 | can be ENET1_1588_EVENT0_OUT5 | |
| J4.19 | DIO2 | SAI1_RXD1 | GPIO4_3 | dio2 | ||
| J4.20 | DIO3 | SAI1_RXD2 | GPIO4_4 | dio3 |
- This is the connector pinout.
- This is the signal name from the Venice hardware manuals
- This is the bank_pin name that can be used in U-Boot (see here)
- This is the name provided to Linux via gpio-line-names in the device-tree (see here)
- Any of the above pin function assignments can be altered by changing the device-tree to change the pinmux which is also where you can specify drive strength, pull-up, pull-down etc.
Note that all signals (unless noted in notes) are 3.3V tolerant.
Note that any GPIO can be used for the following:
- an additional SPI chip-select for those boards that have a SPI bus connector
- a 'bit-banged' PWM (using CPU timers)
- a 'bit-banged' I2C bus (using CPU timers)
- a 'bit-banged' MDIO bus (using CPU timers)
GPIO Mapping Table
Below is a chart for the Venice GPIO mappings.
Useful links
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