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Venice Errata
- VN1 eth0 LED's dim
- VN2: GSC lockup
- VN3 Active PoE Circuit Leakage & Reset
- VN4 GPY111 PHY replacement
- VN5 GPY111 PHY bit error rate and link errata
- VN6 GPY111 limited ESD protection
- VN7 Onboard WiFi Non-Functional
- VN8 Low GSC Battery Voltage Causes Board Not to Power On
- VN9 GSC v63/v64 unintentional reset during supervisor enable
- VN10 LAN7430 EEPROM OTP not programmed
Venice Errata
The below errata only affects certain models and certain revisions.
Please contact support@… with any questions.
Product Change Notifications (PCNs) are issued when errata or new revisions are released for Gateworks SBCs. Subscribe to the following Google group to get automatic notifications.
There are two ways to subscribe:
- Send email to
pcn+subscribe@gateworks.com
- This does not require a Google account and will send PCN notifications as e-mails
- Join group at URL https://groups.google.com/a/gateworks.com/d/forum/pcn
- This requires a Google account and provides a forum-like User Interface which provides a richer experience including history
PCN Events are triggered by several sources:
- Errata - Venice, Newport, Ventana, Laguna
- ECO - New Board Revision
- GSC firmware updates - changes to GSC firmware that ships on non revision locked board models by default
- Firmware image updates - changes to pre-built firmware image that ships on non revision locked board models by default (bootloaders + OS)
- Product End Of Life (EOL) notification (single board computers as well as popular OEM add-on cards re-sold through the store)
VN1 eth0 LED's dim
Issue:
- The Link speed and activity LED's on the eth0 RJ45 are insufficiently illuminated.
Resolution:
- This is resolved on PCB 02210198-02 (GW730x-C) (Rev C)
Affected Product:
- GW730x-B (PCB 02210198-01)
VN2: GSC lockup
Issue:
- An errata in the MSP430FR5847 used as the GSC (GSCv3) for Venice single board computers can cause unexpected GSC lockup events. The effects of a GSC lockup can be described as:
- failure of board to boot due to inability to read board I2C EEPROM
- failure to read the I2C RTC and update the system time
- failure to adjust ARM CPU core voltage regulator during cpu frequency changes
- loss of RTC and GSC register configuration
Affected Product:
- GW7xxx
Resolution:
- Update boards to GSC firmware v60
Fixed in:
- GSC firmware v60
VN3 Active PoE Circuit Leakage & Reset
Issue:
- PoE leakage current can charge up the barrel jack detection circuit (WAD circuit) and shut down the PoE input
- Add resistor to sink current
Affected Product:
- GW730x-C (PCB 02210198-02)
- GW7902x-C (PCB 02210224-02)
- GW730x-D (PCB 02210198-03)
Resolution:
- This is resolved on PCB 02210198-02 (GW730x-C.1) (Rev C.1)
- This is resolved on PCB 02210224-02 (GW7902-C.1, SP467-C.2 & C.3, SP476-C.1, SP477-C.1, SP481-C.1 ) (Rev C.1)
- This is resolved on PCB 02210198-04 (GW730x-E)
VN4 GPY111 PHY replacement
Issue:
- Due to supply chain limitations the DP83867 GbE PHY has been replaced with the GPY111 GbE PHY
Resolution:
- Software support which is already present in the latest Venice Gateworks boot firmware is needed to support this PHY. If using older boot firmware the following patches are needed:
- No changes are necessary to the Linux kernel as long as you are not using the kernel driver intended for this PHY; CONFIG_INTEL_XWAY_PHY / drivers/net/phy/intel-xway.c; This driver may unintentionally reset the PHY and disturb the proper RGMII internal delays and/or LED functionality - do not use this driver by disabling it (CONFIG_INTEL_XWAY_PHY=n or blacklisting/removing the module)
Affected Products:
- GW700x-E+ (PCB 02210210-04) (SoM used on GW710x/GW720x/GW730x boards)
- GW7902-C+ (PCB 02210224-02)
Notes:
- To determine what version of SoM your GW710x/GW720x/GW730x board uses use the 'gsc' command in U-Boot:
u-boot=> gsc Model : GW7300-00-B1B Serial : 852418 MFGDate : 10-20-2020 SOM : GW7000-B 852418 10-20-2020 BASE : GW7300-B1 849162 10-06-2020 ...
- If your software has the required support the PHY will be shown in U-Boot as follows:
Net: GPY111 eth0: ethernet@30be0000 [PRIME]
VN5 GPY111 PHY bit error rate and link errata
Issue:
- The GPY111 PHY used on a variety of boards in the Venice product family has some errata from the manufacturer that affects Venice products:
- When operating on a GbE link occasionally a link will have a high CRC error rate directly after a cable plug-in or board power-up event. A link down/up event will typically resolve this issue.
Resolution:
- Issue #1 is addressed internally by firmware in the PHY: If the PHY exceeds an allowed threshold of 'Start-of-Stream Delimiter' (SSD) errors it will restart link negotiation a number of times before finally giving up and will then 'Auto-Downspeed' (ADS) to a 100mbps link. This feature is configured by the PHY LSADS field (bit 15 - 14) of the PHY_PHYCTL2 MII register (0x14) where a value of 00b is Off (ADS disabled), 01B will retry 1 time, 10B will retry 3 times (default), and 11B will retry 4 times. An ADS event is signaled by the LSADS bit (bit 8) of the PHY_PHYSTAT1 (0x11) MII register being set. The overall affect of using ADS is that the link may not be stable until it has settled after the link is brought up and in rare cases the link may settle at 100mbps. In extensive testing it has been found that link retries occurs about 1 in 100 plug-in/power-up events, an Auto-Downspeed to 100m occurs less than 1 in 5000 plug-in/power-up events, and that the link is stable within 30 seconds.
Affected Products:
- GW700x-E+ (PCB 02210210-04)
- GW7902-C+
- GW7903-A+
VN6 GPY111 limited ESD protection
Issue:
- The GPY111 PHY used on a variety of boards lacks internal ESD protection to the level of modern standards which could result in network functionality being permanently limited due to ESD cable hot-plug events.
Workaround:
- For outdoor applications and boards that could be exposed to electrical events, we would recommend you use an external RJ45 surge protector. The following product also additionally helps to protect against lightning events up to IEC 61000-4-5 (Lightning) 40A (8/20us):
- Watchful Eye WTH-SG/RJ45-S, US121101X (Also available on Amazon)
Resolution:
- additional ESD protection has been added between the GPY111 PHY and magnetics to the RJ45. Note that for GW71xx/GW72xx/GW73xx the GPY111 PHY is on the SoM and the external ESD protection is on the baseboard.
Affected Products:
- GW710x-A/B/C baseboard with GW700x-E+ SoM
- GW720x-A/B/C/D baseboard with GW700x-E+ SoM
- GW730x-A/B/C baseboard with GW700x-E+ SoM
- GW740x-A
Resolved on:
- GW710x-D (PCB 02210196-03)
- GW720x-E (PCB 02210197-04)
- GW730x-D (PCB 02210198-03)
- GW740x-B (PCB 02210199-01)
To determine if your board is affected use the 'gsc' command in U-Boot to see the model of the GW700x SoM and the baseboard:
u-boot=> gsc GSCv3 : v61 0x1d6f RST:VIN Thermal protection:enabled at 96C RTC : 2022-07-06 17:52:43 UTC Model : GW7200-00-B1C1 Serial : 856948 MFGDate : 01-22-2021 SOM : GW7000-C1 856948 01-22-2021 BASE : GW7200-B1 869388 05-12-2021
- this example shows a GW7000-C.1 SoM on a GW7200-B.1 baseboard.
Contact sales@… if you need assistance
VN7 Onboard WiFi Non-Functional
Issue:
- The onboard Laird LWB-5+ module WiFi interface is non-functioning. The BLE interface works properly.
Affected Product:
- GW7301-D (PCB 02210198-03) Note the standard GW7300-D does not include this module.
Resolution:
- This is resolved on PCB 02210198-04 (GW730x-E)
VN8 Low GSC Battery Voltage Causes Board Not to Power On
Issue:
- When the rechargeable battery is below 1.8VDC voltage, the GSC may not reset the board properly when in the default configuration which implements a 'cold boot' (power cycle) to perform system resets and reboots. This can result in a SBC that does not power back on.
Workaround:
- Remove the GSC Battery to get the board to power back on (if needed)
- Operate without a GSC battery to avoid the issue
- or Do the following modifications:
- Update to GSC v65 firmware GSC v65 Firmware & Instructions
- Clear GSC R0.7 (CPU_WDOG_POWERCYCLE) (instructions here )
- Do not use the GSC sleep capability (ie remove /lib/systemd/system-shutdown/gsc-poweroff from Ubuntu if you are not using the latest Gateworks Ubuntu release)
- Example command to remove:
rm /lib/systemd/system-shutdown/gsc-poweroff
- Example command to remove:
Resolution:
- This will be resolved in hardware on future hardware revisions
Affected Products:
- GW710x-A/B/C/D
- GW720x-A/B/C/D/E
- GW730x-A/B/C/D/E
- GW740x-A/B
Resolved on:
- GW710x-E (PCB 02210196-04)
- GW720x-F (PCB 02210197-05)
- GW730x-F (PCB 02210198-05)
- GW740x-C (PCB 02210199-02)
VN9 GSC v63/v64 unintentional reset during supervisor enable
Issue:
- When the voltage supervisor is enabled (done in U-Boot) the GSC (with firmware v63 or v64) will unintentionally reset causing the RTC to clear. Note this only occurs for newer baseboard models which have a GSC LDO regulator (see resolved on in errata VN8)
Resolution:
- Update to GSC v65 firmware GSC v65 Firmware
Affected Products:
- The following baseboards with GSC v63 or v64 firmware
- GW710x-E+
- GW720x-F+
- GW730x-F+
- GW740x-C+
VN10 LAN7430 EEPROM OTP not programmed
Issue:
- A small number of GW7200-G and GW7201-G shipped between 2024-07-17 and 2024-09-16 did not have the LAN7430 (eth1 PCIe GbE controller) EEPROM programmed on the Gateworks test fixture. This causes the RJ45 LED's on eth1 to not be configured properly (will never illuminate) but otherwise the network device is fully functional.
Resolution:
- You can manually program the LAN7430 EEPROM to correct this using ethtool which is on the default Ubuntu based firmware image by executing (can cut-and-paste) the following:
DEV=eth1 ethtool --eeprom-dump eth1 offset 0 length 1 | tail -1 | grep f3 && echo "already programmed" && exit M1=$(hexdump -C /sys/devices/platform/soc@0/30800000.bus/30a30000.i2c/i2c-1/1-0052/eeprom | head -1 | cut -d" " -f8) M2=$(hexdump -C /sys/devices/platform/soc@0/30800000.bus/30a30000.i2c/i2c-1/1-0052/eeprom | head -1 | cut -d" " -f7) M3=$(hexdump -C /sys/devices/platform/soc@0/30800000.bus/30a30000.i2c/i2c-1/1-0052/eeprom | head -1 | cut -d" " -f6) M4=$(hexdump -C /sys/devices/platform/soc@0/30800000.bus/30a30000.i2c/i2c-1/1-0052/eeprom | head -1 | cut -d" " -f5) M5=$(hexdump -C /sys/devices/platform/soc@0/30800000.bus/30a30000.i2c/i2c-1/1-0052/eeprom | head -1 | cut -d" " -f4) M6=$(hexdump -C /sys/devices/platform/soc@0/30800000.bus/30a30000.i2c/i2c-1/1-0052/eeprom | head -1 | cut -d" " -f3) ethtool --set-priv-flags $DEV OTP_ACCESS on ethtool --eeprom-dump $DEV # dump eeprom like hexdump ethtool --eeprom-dump $DEV raw on > eeprom-backup.bin ethtool --change-eeprom $DEV magic 0x74f3 offset 0x00 length 1 value 0xf3 # OTP Programmed indicator ethtool --change-eeprom $DEV magic 0x74f3 offset 0x01 length 1 value 0x$M1 ethtool --change-eeprom $DEV magic 0x74f3 offset 0x02 length 1 value 0x$M2 ethtool --change-eeprom $DEV magic 0x74f3 offset 0x03 length 1 value 0x$M3 ethtool --change-eeprom $DEV magic 0x74f3 offset 0x04 length 1 value 0x$M4 ethtool --change-eeprom $DEV magic 0x74f3 offset 0x05 length 1 value 0x$M5 ethtool --change-eeprom $DEV magic 0x74f3 offset 0x06 length 1 value 0x$M6 ethtool --change-eeprom $DEV magic 0x74f3 offset 0x07 length 1 value 0x03 # PCIe Configuration Enables: 0x00140003 ethtool --change-eeprom $DEV magic 0x74f3 offset 0x09 length 1 value 0x14 # ethtool --change-eeprom $DEV magic 0x74f3 offset 0x0b length 1 value 0x55 # VID:0x1055 ethtool --change-eeprom $DEV magic 0x74f3 offset 0x0c length 1 value 0x10 # ethtool --change-eeprom $DEV magic 0x74f3 offset 0x0d length 1 value 0x30 # PID:0x7430 ethtool --change-eeprom $DEV magic 0x74f3 offset 0x0e length 1 value 0x74 # ethtool --change-eeprom $DEV magic 0x74f3 offset 0x15 length 1 value 0x05 # PCI-PM/ASPM L1.2 supported ethtool --change-eeprom $DEV magic 0x74f3 offset 0x1b length 1 value 0xb8 # MAC Configuration Values: ASC/ADD/ADP/EEEEN ethtool --change-eeprom $DEV magic 0x74f3 offset 0x1d length 1 value 0x33 # enable LED0/LED1 and invert polarity ethtool --change-eeprom $DEV magic 0x74f3 offset 0x1f length 1 value 0x10 # CSR 0x18[7:0]; LED1 Link1000, LED0 Link ethtool --change-eeprom $DEV magic 0x74f3 offset 0x20 length 1 value 0x44 # CSR 0x1c[15:8]; LED Activity Output select, 5Hz blink rate / 200 ms pulse-stretch ethtool --change-eeprom $DEV magic 0x74f3 offset 0x21 length 1 value 0x02 # CSR 0x1c[7:0]; LED0 blink/combo enable; LED1 blink/combo disable
Affected Products:
- The following baseboards are affected (provide Gateworks with the serial number of your board to inquire if this is an issue on your product)
- GW7200-G and GW7201-G shipped between 2024-07-17 and 2024-09-16