Version 9 (modified by 2 years ago) ( diff ) | ,
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Venice Errata
The below errata only affects certain models and certain revisions.
Please contact support@… with any questions.
VN1 eth0 LED's dim
Issue:
- The Link speed and activity LED's on the eth0 RJ45 are insufficiently illuminated.
Resolution:
- This is resolved on PCB 02210198-02 (GW730x-C) (Rev C)
Affected Product:
- GW730x-B (PCB 02210198-01)
VN2: GSC lockup
Issue:
- An errata in the MSP430FR5847 used as the GSC (GSCv3) for Venice single board computers can cause unexpected GSC lockup events. The effects of a GSC lockup can be described as:
- failure of board to boot due to inability to read board I2C EEPROM
- failure to read the I2C RTC and update the system time
- failure to adjust ARM CPU core voltage regulator during cpu frequency changes
- loss of RTC and GSC register configuration
Affected Product:
- GW7xxx
Resolution:
- Update boards to GSC firmware v60
Fixed in:
- GSC firmware v60
VN3 Active PoE Circuit Leakage & Reset
Issue:
- PoE leakage current can charge up the barrel jack detection circuit (WAD circuit) and shut down the PoE input
- Add resistor to sink current
Affected Product:
- GW730x-C (PCB 02210198-02)
- GW7902x-C (PCB 02210224-02)
- GW730x-D (PCB 02210198-03)
Resolution:
- This is resolved on PCB 02210198-02 (GW730x-C.1) (Rev C.1)
- This is resolved on PCB 02210224-02 (GW7902-C.1, SP467-C.2 & C.3, SP476-C.1, SP477-C.1, SP481-C.1 ) (Rev C.1)
- This is resolved on PCB 02210198-04 (GW730x-E)
VN4 GPY111 PHY replacement
Issue:
- Due to supply chain limitations the DP83867 GbE PHY has been replaced with the GPY111 GbE PHY
Resolution:
- Software support which is already present in the latest Venice Gateworks boot firmware is needed to support this PHY. If using older boot firmware the following patches are needed:
- No changes are necessary to the Linux kernel as long as you are not using the kernel driver intended for this PHY; CONFIG_INTEL_XWAY_PHY / drivers/net/phy/intel-xway.c; This driver may unintentionally reset the PHY and disturb the proper RGMII internal delays and/or LED functionality - do not use this driver by disabling it (CONFIG_INTEL_XWAY_PHY=n or blacklisting/removing the module)
Affected Products:
- GW700x-E+ (PCB 02210210-04) (SoM used on GW710x/GW720x/GW730x boards)
- GW7902-C+ (PCB 02210224-02)
Notes:
- To determine what version of SoM your GW710x/GW720x/GW730x board uses use the 'gsc' command in U-Boot:
u-boot=> gsc Model : GW7300-00-B1B Serial : 852418 MFGDate : 10-20-2020 SOM : GW7000-B 852418 10-20-2020 BASE : GW7300-B1 849162 10-06-2020 ...
- If your software has the required support the PHY will be shown in U-Boot as follows:
Net: GPY111 eth0: ethernet@30be0000 [PRIME]
VN5 GPY111 PHY bit error rate and link errata
Issue:
- The GPY111 PHY used on a variety of boards in the Venice product family has some errata from the manufacturer that affects Venice products:
- When operating on a GbE link occasionally a link will have a high CRC error rate directly after a cable plug-in or board power-up event. A link down/up event will typically resolve this issue.
Resolution:
- Issue #1 is addressed internally by firmware in the PHY: If the PHY exceeds an allowed threshold of 'Start-of-Stream Delimiter' (SSD) errors it will restart link negotiation a number of times before finally giving up and will then 'Auto-Downspeed' (ADS) to a 100mbps link. This feature is configured by the PHY LSADS field (bit 15 - 14) of the PHY_PHYCTL2 MII register (0x14) where a value of 00b is Off (ADS disabled), 01B will retry 1 time, 10B will retry 3 times (default), and 11B will retry 4 times. An ADS event is signaled by the LSADS bit (bit 8) of the PHY_PHYSTAT1 (0x11) MII register being set. The overall affect of using ADS is that the link may not be stable until it has settled after the link is brought up and in rare cases the link may settle at 100mbps. In extensive testing it has been found that link retries occurs about 1 in 100 plug-in/power-up events, an Auto-Downspeed to 100m occurs less than 1 in 5000 plug-in/power-up events, and that the link is stable within 30 seconds.
Affected Products:
- GW700x-E+ (PCB 02210210-04)
- GW7902-C+
- GW7903-A+
VN6 GPY111 limited ESD protection
Issue:
- The GPY111 PHY used on a variety of boards lacks internal ESD protection to the level of modern standards which could result in network functionality being permanently limited due to ESD cable hot-plug events.
Workaround:
- For outdoor applications and boards that could be exposed to electrical events, we would recommend you use an external RJ45 surge protector. The following product also additionally helps to protect against lightning events up to IEC 61000-4-5 (Lightning) 40A (8/20us):
- Watchful Eye WTH-SG/RJ45-S, US121101X (Also available on Amazon)
Resolution:
- additional ESD protection has been added between the GPY111 PHY and magnetics to the RJ45. Note that for GW71xx/GW72xx/GW73xx the GPY111 PHY is on the SoM and the external ESD protection is on the baseboard.
Affected Products:
- GW710x-A/B/C baseboard with GW700x-E+ SoM
- GW720x-A/B/C/D baseboard with GW700x-E+ SoM
- GW730x-A/B/C baseboard with GW700x-E+ SoM
- GW740x-A
Resolved on:
- GW710x-D (PCB 02210196-03)
- GW720x-E (PCB 02210197-04)
- GW730x-D (PCB 02210198-03)
- GW740x-B (PCB 02210199-01)
To determine if your board is affected use the 'gsc' command in U-Boot to see the model of the GW700x SoM and the baseboard:
u-boot=> gsc GSCv3 : v61 0x1d6f RST:VIN Thermal protection:enabled at 96C RTC : 2022-07-06 17:52:43 UTC Model : GW7200-00-B1C1 Serial : 856948 MFGDate : 01-22-2021 SOM : GW7000-C1 856948 01-22-2021 BASE : GW7200-B1 869388 05-12-2021
- this example shows a GW7000-C.1 SoM on a GW7200-B.1 baseboard.
Contact sales@… if you need assistance
VN7 Onboard Wifi nonfunctional.
Issue:
- The onboard Laird LWB-5+ module Wifi interface is non functioning. The BLE interface works properly.
Affected Product:
- GW730x-D (PCB 02210198-03) (specifically GW7301-D)
Resolution:
- This is resolved on PCB 02210198-04 (GW730x-E)