Changes between Version 14 and Version 15 of venice/npu


Ignore:
Timestamp:
08/16/2024 07:02:53 PM (5 weeks ago)
Author:
Tim Harvey
Comment:

added pageoutline and a bit more detail on the NPU

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  • venice/npu

    v14 v15  
    1 = Neural Processing Unit
     1[[PageOutline]]
     2
     3= IMX8MP Neural Processing Unit
    24
    35The Gateworks Venice SBCs that are using the i.MX8M Plus processors have a built in Neural Processing Unit (NPU) for machine learning.
    … …  
    57 * Any GW71xx, GW72xx and GW73xx using a GW702x SOM module will use the i.MX8M Plus processor
    68
    7 The NPU operatines up to 2.25 TOPS. Out of the box, this makes Gateworks boards with NPU capabilities powerful for AI applications on the edge.
     9The IMX8MP NPU IP is !VeriSilicon (Vivante VIP8000) and offers 2.3 TOPS of acceleration for inference in endpoint devices; object identification, speech recognition of 40K words, or even medical imaging (!MobileNet v1 at 500 images per second). Out of the box, this makes Gateworks boards with NPU capabilities powerful for AI applications on the edge.
    810
    911[[Image(https://trac.gateworks.com/raw-attachment/wiki/venice/npu/gw74xx_npu_benchmark_new.png)]]
    … …  
    1820The steps are as generalized as possible to not depend on the boards available RAM to load an image, or the low speeds of JTAG uploading, as the .wic from NXP is >8GB. We will use a ramdisk to boot a "rescue image" fully in RAM, then use dd to write from the removable multimedia (flash drive) to the onboard eMMC (/dev/mmcblk2).
    1921
    20 **NOTE**: In the scripts below, we disable PCIe as a temporary fix to prevent the NXP 6.6.3_1.0.0 kernel from hanging on boot. This is caused by a missing patch necessary for the PCIe switch, which can be found specifically [[https://github.com/Gateworks/linux-venice/commit/cf983e4a04eecb5be93af7b53cb10805ee448998|here]] from our kernel.
     22**NOTE**: In the scripts below, we disable PCIe as a temporary fix to prevent the NXP 6.6.3_1.0.0 kernel from hanging on boot. This is caused by a missing patch necessary to work around a PCIe switch quirk when used on the IMX8MP, which can be found specifically [[https://github.com/Gateworks/linux-venice/commit/cf983e4a04eecb5be93af7b53cb10805ee448998|here]] from our kernel.
    2123== Getting Started with the NPU
    2224=== 1. Download the Gateworks Venice Rescue Image to removable multimedia.